architeuthis
/
datasheets
forked from sinara-hw/datasheets
1
0
Fork 0
Code Pull Requests Activity

4456: update attenuator API

This commit is contained in:
occheung 2022-02-07 14:26:58 +08:00
parent 6199e4bb5e
commit 2ca8632582
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
4456.tex
View File

@ -431,7 +431,7 @@ They do not exhaustively demonstrate all the features of the ARTIQ system.
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
\subsection{1 GHz Sinusoidal Wave}
Generate a 1 GHz sinusoid from RF0 with full scale amplitude, attenuated by 6 dB.
Generate a 1 GHz sinusoid from RF0 with full scale amplitude, attenuated by 12 dB.
Both the CPLD and the PLL channels should be initialized.
\inputcolorboxminted{firstline=10,lastline=17}{examples/pll.py}

2
examples/pll.py
View File

@ -13,7 +13,7 @@ class MirnyEnv(EnvExperiment):
self.cpld.init()
self.pll0.init()
self.pll0.set_frequency(1*GHz)
self.pll0.set_att_mu(0b11001100)
self.pll0.set_att(12*dB)
self.pll0.sw.on()