Sebastien Bourdeauducq
|
8d4e42be32
|
remove redpitaya and coraz7 support
|
2021-02-15 19:30:13 +08:00 |
Sebastien Bourdeauducq
|
4039431533
|
kasli_soc: fix eem iostandards
|
2021-02-07 22:34:29 +08:00 |
Sebastien Bourdeauducq
|
3f9bd06468
|
add Kasli-SoC generic gateware builder (WIP)
|
2021-02-07 14:44:32 +08:00 |
Astro
|
32048ead20
|
gateware/coraz7: remove unused VARIANTS
|
2020-11-14 02:24:29 +01:00 |
Astro
|
113c8eb0b8
|
add coraz7 + redpitaya targets
|
2020-11-13 20:17:18 +01:00 |
pca006132
|
03d9827a5a
|
acpki: working
|
2020-09-09 21:24:49 +08:00 |
Sebastien Bourdeauducq
|
537f4968eb
|
acpki: add legacy i_status/o_status registers
|
2020-08-04 17:31:35 +08:00 |
Sebastien Bourdeauducq
|
62988a580e
|
acpki: update for combined RTIO channel/address
|
2020-08-04 17:28:15 +08:00 |
Sebastien Bourdeauducq
|
1e20259c36
|
fix acpki selection
|
2020-08-04 13:26:45 +08:00 |
Sebastien Bourdeauducq
|
f8d4036451
|
add ACP kernel initiator
Based on work by Chris Ballance
https://github.com/m-labs/artiq/issues/1167#issuecomment-427188287
M-Labs/artiq-zynq#55
Work-in-progress, only gateware part and build system, untested.
|
2020-08-04 13:15:26 +08:00 |
Sebastien Bourdeauducq
|
59cf2764ce
|
dma: report AXI bus error
|
2020-07-21 12:47:20 +08:00 |
Sebastien Bourdeauducq
|
21135c6a41
|
analyzer: report AXI bus errors
|
2020-07-20 19:51:22 +08:00 |
Sebastien Bourdeauducq
|
523524c319
|
zc706: add RTIO log channels
|
2020-07-19 14:05:35 +08:00 |
Sebastien Bourdeauducq
|
f69e41af5e
|
gateware: fix VADJ I/O standard conflict
|
2020-07-16 17:58:31 +08:00 |
Sebastien Bourdeauducq
|
6a361893c2
|
gateware: make LEDs common to all variants
Makes quick testing easier.
|
2020-07-16 17:36:27 +08:00 |
Sebastien Bourdeauducq
|
ae7ca22db9
|
dma: fix endianness issues
|
2020-07-16 17:27:08 +08:00 |
Sebastien Bourdeauducq
|
10a12245a3
|
analyzer: fix endianness issue
|
2020-07-16 17:10:09 +08:00 |
Sebastien Bourdeauducq
|
0c6db0d12c
|
analyzer: use 32-bit byte_count
|
2020-07-16 11:36:04 +08:00 |
Sebastien Bourdeauducq
|
0b0ca8de49
|
analyzer: drive wid and wstrb
|
2020-07-15 23:11:19 +08:00 |
Sebastien Bourdeauducq
|
8e758ecc17
|
add RTIO analyzer core (untested)
|
2020-07-15 23:06:34 +08:00 |
Sebastien Bourdeauducq
|
b68cb137e5
|
dma: style
|
2020-07-15 23:06:14 +08:00 |
Sebastien Bourdeauducq
|
12ba867268
|
dma: fix and cleanup test
|
2020-07-13 18:58:08 +08:00 |
Sebastien Bourdeauducq
|
5c3c3c26b5
|
dma: fix inflight_cnt and eop generation
|
2020-07-13 18:51:55 +08:00 |
Sebastien Bourdeauducq
|
ea96cf96d3
|
dma: add simulation test (WIP)
|
2020-07-13 12:04:10 +08:00 |
Sebastien Bourdeauducq
|
10888cc6c6
|
dma: remove unneeded import
|
2020-07-13 10:42:02 +08:00 |
Sebastien Bourdeauducq
|
a7073edf79
|
add DMA core (untested)
|
2020-07-13 10:37:17 +08:00 |
Sebastien Bourdeauducq
|
e3ff21b1b5
|
create gateware folder
|
2020-07-11 17:49:54 +08:00 |