forked from M-Labs/humpback-dds
tcp_client: rm extra clk
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eaaee84fbc
commit
d6a05a7579
@ -84,16 +84,14 @@ fn main() -> ! {
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let ccdr = rcc
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let ccdr = rcc
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.use_hse(8.mhz())
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.use_hse(8.mhz())
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.sysclk(400.mhz())
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.sysclk(400.mhz())
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.hclk(200.mhz())
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// .hclk(200.mhz())
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.per_ck(100.mhz())
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// .per_ck(100.mhz())
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.pll1_q_ck(48.mhz()) // for SPI
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.pll1_q_ck(48.mhz()) // for SPI
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.pll1_r_ck(400.mhz()) // for TRACECK
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.pll1_r_ck(400.mhz()) // for TRACECK
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.pll2_p_ck(100.mhz())
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// .pll2_p_ck(100.mhz())
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.pll2_q_ck(100.mhz())
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// .pll2_q_ck(100.mhz())
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.freeze(vos, &dp.SYSCFG);
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.freeze(vos, &dp.SYSCFG);
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// info!("{}", ccdr.clocks.c_ck().0);
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unsafe {
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unsafe {
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logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
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logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
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}
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}
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@ -26,7 +26,7 @@ pub unsafe fn enable_itm(
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*(0x5c00_4fb0 as *mut u32) = 0xC5ACCE55;
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*(0x5c00_4fb0 as *mut u32) = 0xC5ACCE55;
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// SWO CODR Register: Set SWO speed
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// SWO CODR Register: Set SWO speed
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*(0x5c00_3010 as *mut _) = 200;
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*(0x5c00_3010 as *mut _) = 199;
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// SWO SPPR Register:
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// SWO SPPR Register:
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// 1 = Manchester
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// 1 = Manchester
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