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cpld: add release

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occheung 2020-08-10 00:52:05 +08:00
parent 58e77ae671
commit 8e7fe971cb
1 changed files with 8 additions and 3 deletions
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11
src/cpld.rs
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@ -48,15 +48,20 @@ impl<SPI, CS0, CS1, CS2> CPLD<SPI, CS0, CS1, CS2> where
match channel & (1 << 0) { match channel & (1 << 0) {
0 => self.chip_select.0.set_low(), 0 => self.chip_select.0.set_low(),
_ => self.chip_select.0.set_high(), _ => self.chip_select.0.set_high(),
}; }.ok();
match channel & (1 << 1) { match channel & (1 << 1) {
0 => self.chip_select.1.set_low(), 0 => self.chip_select.1.set_low(),
_ => self.chip_select.1.set_high(), _ => self.chip_select.1.set_high(),
}; }.ok();
match channel & (1 << 2) { match channel & (1 << 2) {
0 => self.chip_select.2.set_low(), 0 => self.chip_select.2.set_low(),
_ => self.chip_select.2.set_high(), _ => self.chip_select.2.set_high(),
}; }.ok();
}
// Return the SPI and CS pins
pub fn release(self) -> (SPI, (CS0, CS1, CS2)) {
return (self.spi, self.chip_select);
} }
} }