forked from M-Labs/zynq-rs
62 lines
1.8 KiB
Rust
62 lines
1.8 KiB
Rust
///! Register definitions for Application Processing Unit (mpcore)
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use volatile_register::{RO, RW};
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use libregister::{
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register, register_at, register_bit, register_bits,
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RegisterW, RegisterRW,
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};
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#[repr(C)]
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pub struct RegisterBlock {
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pub scu_control: ScuControl,
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pub scu_config: RO<u32>,
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pub scu_cpu_power: RW<u32>,
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pub scu_invalidate: ScuInvalidate,
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reserved0: [u32; 12],
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pub filter_start: RW<u32>,
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pub filter_end: RW<u32>,
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reserved1: [u32; 2],
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pub scu_access_control: RW<u32>,
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pub scu_non_secure_access_control: RW<u32>,
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// there is plenty more (unimplemented)
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}
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register_at!(RegisterBlock, 0xF8F00000, new);
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register!(scu_control, ScuControl, RW, u32);
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register_bit!(scu_control, ic_standby_enable, 6);
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register_bit!(scu_control, scu_standby_enable, 5);
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register_bit!(scu_control, force_to_port0_enable, 4);
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register_bit!(scu_control, scu_speculative_linefill_enable, 3);
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register_bit!(scu_control, scu_rams_parity_enable, 2);
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register_bit!(scu_control, address_filtering_enable, 1);
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register_bit!(scu_control, enable, 0);
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impl ScuControl {
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pub fn start(&mut self) {
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self.modify(|_, w| w.enable(true));
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}
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}
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register!(scu_invalidate, ScuInvalidate, WO, u32);
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register_bits!(scu_invalidate, cpu0_ways, u8, 0, 3);
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register_bits!(scu_invalidate, cpu1_ways, u8, 4, 7);
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register_bits!(scu_invalidate, cpu2_ways, u8, 8, 11);
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register_bits!(scu_invalidate, cpu3_ways, u8, 12, 15);
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impl ScuInvalidate {
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pub fn invalidate_all_cores(&mut self) {
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self.write(ScuInvalidate::zeroed()
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.cpu0_ways(0xf)
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.cpu1_ways(0xf)
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.cpu2_ways(0xf)
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.cpu3_ways(0xf)
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);
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}
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pub fn invalidate_core1(&mut self) {
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self.write(ScuInvalidate::zeroed()
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.cpu1_ways(0xf)
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);
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}
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}
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