0714162113
rename target_cora_z7_10 to target_coraz7 globally
2020-11-13 17:56:47 +01:00
5b2c779cba
libboard_zynq: delint ps7_init
2020-11-13 00:23:56 +01:00
0a40d4f36d
libboard_zynq: fix zc706 build
2020-11-13 00:23:38 +01:00
55f8d02da8
libboard_zynq: remove ddr-only ps7_init for redpitaya
2020-11-13 00:12:43 +01:00
990fa56d6a
libboard_zynq: complete ddr without ps7_init for redpitaya
2020-11-13 00:10:34 +01:00
8fd317d580
libboard_zynq: remove ps7_init for cora_z7_10
2020-11-11 14:21:48 +01:00
07fedddad9
libboard_zynq: doc ddr size limitation, correct target_redpitaya to 512MB
2020-11-11 13:25:55 +01:00
0fde82a982
szl: add target_cora_z7_10
2020-11-10 20:57:31 +01:00
dffe3cb251
libboard_zynq: rm superfluous ddr settings for cora_z7_10
2020-11-10 20:53:46 +01:00
b9323653bb
libboard_zynq: complete ddr without ps7_init for cora_z7_10
2020-11-10 14:33:31 +01:00
515d3bb381
libboard_zynq: configure ddr while keeping rstb low
2020-11-08 22:47:59 +01:00
7e22010d7d
libboard_zynq: fix pll_cp/pll_res swap in ClockSource::setup()
2020-11-08 22:46:43 +01:00
9ee77d8f44
libboard_zynq: indent ps7_init/cora_z7_10
2020-11-08 19:32:31 +01:00
e508b78b3e
libboard_zynq: add ps7_init for cora_z7_10
2020-11-08 19:28:59 +01:00
aef010cb14
openocd: remove xilinx-tcl on Cora Z7
2020-11-08 18:44:41 +01:00
d623913535
libconfig: fixed szl build.
...
to_lowercase would handle unicode which causes a huge increase in rodata
size, we have to use to_ascii_lowercase.
2020-11-04 20:47:40 +08:00
0efc7a616f
libconfig: implemented config write
...
Config write and config remove are now implemented.
Config keys are now treated case insensitively, which is consistence to
the filesystem behavior.
BOOT.BIN can be replaced by setting the config key "boot".
2020-10-30 16:11:18 +08:00
22833ef0c6
libconfig/sd_reader: added FAT16_LBA ID
2020-10-17 13:37:18 +08:00
80d12d5780
libconfig: make default IP/MAC depend on board
2020-10-14 12:53:32 +08:00
4dd8c93729
add SZL for Red Pitaya
2020-10-14 12:35:23 +08:00
6266d28095
expose patched cargo-xbuild
2020-10-13 18:43:37 +08:00
1796d4e236
update some dependencies
...
Older versions do not compile with newer Rust.
2020-10-13 18:28:42 +08:00
56c94b0855
patch cargo-xbuild to ensure copied Cargo.lock is writable
...
https://github.com/rust-osdev/cargo-xbuild/issues/96
2020-10-13 18:27:52 +08:00
34a63d7732
use new location for libraries in Rust source
2020-10-13 18:27:01 +08:00
27d310a937
update Rust
...
Needed for compatibility with recent cargo-xbuild.
2020-10-13 18:25:39 +08:00
f60d0589cc
fix ps7_init compilation error and warnings
2020-10-01 00:17:47 +08:00
7c9edfdbd5
README: add introduction
2020-09-29 16:27:44 +08:00
c336e450b1
libboard_zynq/eth/phy: add PEF7071
2020-09-29 16:01:54 +08:00
6af453494b
libboard_zynq/ddr: use ps7_init for redpitaya ddr
2020-09-26 17:01:37 +08:00
ac3e6983b0
experiments: fix zc706 build
2020-09-09 21:30:56 +08:00
338f918531
experiments: update banner
2020-09-09 21:29:25 +08:00
4751fd6011
default.nix: build redpitaya-experiments
2020-09-09 21:28:32 +08:00
e601ac9c45
remove flash support
...
PITA to get to work and most boards have SD.
2020-09-09 20:13:13 +08:00
a6955edf14
add Red Pitaya support (WIP)
2020-09-09 20:10:05 +08:00
c634313d5e
update authors in cargo.toml
2020-09-09 19:36:25 +08:00
7360984efb
add libconfig, libcoreio, szl from artiq-zynq a277e89b3ad; update dependencies
2020-09-09 17:56:50 +08:00
82794d3abd
default.nix: make naming consistent with artiq-zynq
2020-09-09 17:12:08 +08:00
450ccef18e
sync nix files with artiq-zynq c3f9a76f2a; add fsbl
2020-09-09 16:51:50 +08:00
4e18368aaf
remove obsolete build.sh
2020-09-09 15:03:17 +08:00
75494421c5
cargo: remove unmaintained runner
2020-09-09 15:01:39 +08:00
c4fb7b4c41
cargo: remove unmaintained dev profile
2020-09-09 15:01:03 +08:00
a51f8f2eea
openocd: remove ps7_init on Cora Z7
2020-09-09 15:00:09 +08:00
7680de26f0
openocd: sync with artiq-zynq 8bb1727e64
2020-09-09 14:58:18 +08:00
7edd192c3b
remove outdated/unmaintained files
2020-09-09 14:57:03 +08:00
4fef8a7192
libasync/executor: reduced reallocation for vector
2020-09-07 16:13:51 +08:00
ae244082ed
more cpu options
2020-09-07 16:13:51 +08:00
66c66447dd
fix some compilation warnings
2020-09-06 00:17:59 +08:00
02c67051e8
CPU options for better performance
...
L2 cache options and prefetch options
2020-09-04 16:38:48 +08:00
08fd1391c5
libcortex_a9/mmu: enabled program flow prediction
2020-09-04 13:18:39 +08:00
a116142f63
libsupport_zynq/ram: check ptr range for deallocation
2020-09-03 12:56:10 +08:00
