forked from M-Labs/humpback-dds
cfg_reg: add status getter
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8f4a97c97e
commit
ccd6a1faf9
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@ -1,5 +1,5 @@
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[target.thumbv7em-none-eabihf]
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[target.thumbv7em-none-eabihf]
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runner = "gdb -q -x gdb_config/debug.gdb"
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runner = "gdb -q -x gdb_config/fpga_config.gdb"
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rustflags = [
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rustflags = [
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"-C", "link-arg=-Tlink.x",
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"-C", "link-arg=-Tlink.x",
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]
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]
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@ -29,7 +29,7 @@ class UrukulConnector(Module):
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]
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]
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# Debug purposes: Tie EEM MISO to EEM MOSI
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# Debug purposes: Tie EEM MISO to EEM MOSI
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self.comb += eem.p[2].eq(eem.n[1])
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self.comb += eem.p[2].eq(eem.p[1])
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if __name__ == "__main__":
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if __name__ == "__main__":
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@ -82,17 +82,29 @@ where
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}
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}
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}
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}
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/*
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* Set configuration bits according to data field
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* Return status
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*/
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fn set_all_configurations(&mut self) -> Result<u32, Error<E>> {
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fn set_all_configurations(&mut self) -> Result<u32, Error<E>> {
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match self.spi.transfer(&mut [
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match self.spi.transfer(&mut [
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((self.data & 0x00FF0000) >> 16) as u8,
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((self.data & 0x00FF0000) >> 16) as u8,
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((self.data & 0x0000FF00) >> 8) as u8,
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((self.data & 0x0000FF00) >> 8) as u8,
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((self.data & 0x000000FF) >> 0) as u8,
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((self.data & 0x000000FF) >> 0) as u8,
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]).map_err(Error::SPI) {
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]).map_err(Error::SPI) {
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Ok(arr) => Ok(self.data),
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Ok(arr) => Ok(
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((arr[0] as u32) << 16) |
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((arr[1] as u32) << 8) |
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arr[2] as u32
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),
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Err(e) => Err(e),
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Err(e) => Err(e),
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}
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}
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}
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}
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/*
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* Set configuration bits according to supplied configs
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* Return status
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*/
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pub fn set_configurations(&mut self, configs: &mut[(CFGMask, u32)]) -> Result<u32, Error<E>> {
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pub fn set_configurations(&mut self, configs: &mut[(CFGMask, u32)]) -> Result<u32, Error<E>> {
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for config in configs.into_iter() {
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for config in configs.into_iter() {
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// Erase the bits in the configuration region
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// Erase the bits in the configuration region
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@ -107,9 +119,22 @@ where
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self.set_all_configurations()
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self.set_all_configurations()
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}
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}
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/*
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* Return selected configuration field
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*/
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pub fn get_configuration(&mut self, config_type: CFGMask) -> u8 {
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pub fn get_configuration(&mut self, config_type: CFGMask) -> u8 {
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((self.data & config_type.get_bitmask()) >> config_type.get_shift()) as u8
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((self.data & config_type.get_bitmask()) >> config_type.get_shift()) as u8
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}
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}
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/*
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* Return status
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*/
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pub fn get_status(&mut self, status_type: CFGMask) -> Result<u8, Error<E>> {
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match self.set_all_configurations() {
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Ok(val) => Ok(((val & status_type.get_bitmask()) >> status_type.get_shift()) as u8),
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Err(e) => Err(e),
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}
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}
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}
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}
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impl<SPI, E> Transfer<u8> for ConfigRegister<SPI>
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impl<SPI, E> Transfer<u8> for ConfigRegister<SPI>
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@ -96,7 +96,7 @@ fn main() -> ! {
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let mut config = ConfigRegister::new(parts.spi1);
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let mut config = ConfigRegister::new(parts.spi1);
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// Target configuration: 0x000FF1CE
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// Target configuration: 0x000FF1CE
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hprintln!("{}", config.set_configurations(&mut [
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hprintln!("{:#06X}", config.set_configurations(&mut [
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(CFGMask::RF_SW, 0xE),
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(CFGMask::RF_SW, 0xE),
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(CFGMask::LED, 0xC),
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(CFGMask::LED, 0xC),
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(CFGMask::PROFILE, 0x1),
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(CFGMask::PROFILE, 0x1),
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