forked from M-Labs/humpback-dds
migen: move add extension into build
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e834e6fcea
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c084da1848
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@ -3,20 +3,12 @@
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extern crate log;
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use log::debug;
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use stm32h7xx_hal::hal::digital::v2::{
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InputPin,
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OutputPin,
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};
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use stm32h7xx_hal::{gpio::Speed, pac, prelude::*, spi};
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use stm32h7xx_hal::{pac, prelude::*, spi};
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use cortex_m;
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use cortex_m::asm::nop;
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use cortex_m_rt::entry;
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use core::ptr;
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use nb::block;
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use firmware::flash::flash_ice40_fpga;
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#[path = "util/logger.rs"]
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@ -42,7 +34,7 @@ fn main() -> ! {
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logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
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}
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let mut delay = cp.SYST.delay(ccdr.clocks);
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let delay = cp.SYST.delay(ccdr.clocks);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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@ -61,14 +53,14 @@ fn main() -> ! {
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let fpga_sdi = gpiob.pb5.into_alternate_af5();
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// Setup SPI_SS_B and CRESET_B
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let mut fpga_ss = gpioa.pa4.into_push_pull_output();
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let mut fpga_creset = gpiof.pf3.into_open_drain_output();
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let fpga_ss = gpioa.pa4.into_push_pull_output();
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let fpga_creset = gpiof.pf3.into_open_drain_output();
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// Setup CDONE
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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// Setup SPI interface
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let mut fpga_cfg_spi = dp.SPI1.spi(
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let fpga_cfg_spi = dp.SPI1.spi(
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(fpga_sck, fpga_sdo, fpga_sdi),
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spi::MODE_3,
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12.mhz(),
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@ -1,24 +1,26 @@
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# Import built in I/O, Connectors & Platform template for Humpback
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from migen.build.platforms.sinara import humpback
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# Import migen platform for Lattice Products
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from migen.build.lattice import LatticePlatform
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# Import migen pin record structure
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from migen.build.generic_platform import *
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from migen.fhdl.module import Module
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from migen.fhdl.specials import Instance
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from migen.genlib.io import *
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from migen.build.lattice.common import LatticeiCE40DifferentialInputImpl
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from migen.genlib.io import DifferentialInput
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spi_cs = [
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("spi_cs", 0, Pins("B13 B14 B15"), IOStandard("LVCMOS33"))
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]
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io_update = [
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("io_update", 0, Pins("A11"), IOStandard("LVCMOS33"))
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]
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class UrukulConnector(Module):
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def __init__(self, platform):
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# Include extension
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spi_cs = [
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("spi_cs", 0, Pins("B13 B14 B15"), IOStandard("LVCMOS33"))
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]
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io_update = [
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("io_update", 0, Pins("A11"), IOStandard("LVCMOS33"))
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]
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# Add extensions
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platform.add_extension(spi_cs)
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platform.add_extension(io_update)
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# Request EEM I/O & SPI
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eem0 = [
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platform.request("eem0", 0),
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@ -82,6 +84,4 @@ class UrukulConnector(Module):
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if __name__ == "__main__":
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platform = humpback.Platform()
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platform.add_extension(spi_cs)
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platform.add_extension(io_update)
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platform.build(UrukulConnector(platform))
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