forked from M-Labs/humpback-dds
tcp_client: rm print
This commit is contained in:
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79ce44552b
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4c88c31aca
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@ -1,195 +1,182 @@
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#![no_std]
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#![no_main]
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#![no_main]
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#![no_std]
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use smoltcp as net;
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use core::sync::atomic::{AtomicU32, Ordering};
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use stm32h7_ethernet as ethernet;
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use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
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use embedded_hal::{blocking::spi::Transfer};
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use heapless::{consts, String};
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// extern crate cortex_m;
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use panic_semihosting as _;
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use cortex_m;
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use cortex_m;
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use cortex_m::asm::nop;
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use cortex_m_rt::{
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use cortex_m_rt::{
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entry,
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entry,
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exception,
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exception,
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};
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};
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use cortex_m_semihosting::hprintln;
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use cortex_m_semihosting::hprintln;
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use panic_halt as _;
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extern crate smoltcp;
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use rtic::cyccnt::{Instant, U32Ext};
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// Ethernet crate for STM32H7 has been merged into HAL in the latest commit
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extern crate stm32h7_ethernet as ethernet;
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use minimq::{
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use stm32h7xx_hal::gpio::Speed;
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embedded_nal::{IpAddr, Ipv4Addr},
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use stm32h7xx_hal::hal::digital::v2::{
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MqttClient, QoS,
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OutputPin,
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InputPin,
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};
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};
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use stm32h7xx_hal::rcc::CoreClocks;
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use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
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use Speed::*;
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use firmware::nal_tcp_client::{NetworkStack, NetStorage, NetworkInterface};
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use libm::round;
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use firmware::{Urukul};
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use firmware::cpld::{CPLD};
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static mut NET_STORE: NetStorage = NetStorage {
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use core::{
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// Placeholder for the real IP address, which is initialized at runtime.
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str,
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ip_addrs: [net::wire::IpCidr::Ipv6(
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fmt::Write
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net::wire::Ipv6Cidr::SOLICITED_NODE_PREFIX,
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)],
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neighbor_cache: [None; 8],
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};
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};
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use core::mem::uninitialized;
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use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr, Ipv4Address};
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use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder, Routes};
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use smoltcp::socket::SocketSet;
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use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
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use smoltcp::time::{Duration, Instant};
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use embedded_nal::TcpStack;
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use firmware;
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use firmware::{
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attenuator::Attenuator,
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config_register::{
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ConfigRegister,
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CFGMask,
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StatusMask,
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},
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dds::{
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DDS,
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DDSCFRMask,
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},
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cpld::{
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CPLD,
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},
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Urukul,
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};
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use scpi::prelude::*;
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/// Configure SYSTICK for 1ms timebase
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fn systick_init(syst: &mut stm32::SYST, clocks: CoreClocks) {
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let c_ck_mhz = clocks.c_ck().0 / 1_000_000;
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let syst_calib = 0x3E8;
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syst.set_clock_source(cortex_m::peripheral::syst::SystClkSource::Core);
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syst.set_reload((syst_calib * c_ck_mhz) - 1);
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syst.enable_interrupt();
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syst.enable_counter();
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}
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/// ======================================================================
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/// Entry point
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/// ======================================================================
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/// TIME is an atomic u32 that counts milliseconds. Although not used
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/// here, it is very useful to have for network protocols
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static TIME: AtomicU32 = AtomicU32::new(0);
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/// Locally administered MAC address
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const MAC_ADDRESS: [u8; 6] = [0x02, 0x00, 0x11, 0x22, 0x33, 0x44];
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/// Ethernet descriptor rings are a global singleton
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#[link_section = ".sram3.eth"]
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#[link_section = ".sram3.eth"]
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static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
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static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
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macro_rules! add_socket {
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// Theoratical maximum number of socket that can be handled
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($sockets:ident, $tx_storage:ident, $rx_storage:ident) => {
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const SOCKET_COUNT: usize = 2;
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let mut $rx_storage = [0; 4096];
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let mut $tx_storage = [0; 4096];
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let tcp_socket = {
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// Give buffer sizes of transmitting and receiving TCP packets
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let tx_buffer = net::socket::TcpSocketBuffer::new(&mut $tx_storage[..]);
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const BUFFER_SIZE: usize = 2048;
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let rx_buffer = net::socket::TcpSocketBuffer::new(&mut $rx_storage[..]);
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net::socket::TcpSocket::new(tx_buffer, rx_buffer)
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};
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let _handle = $sockets.add(tcp_socket);
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};
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}
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pub type UrukulType = Urukul<
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firmware::spi_slave::SPISlave<
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'static,
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firmware::cpld::CPLD<
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stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
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stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
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>,
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stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
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stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
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>
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>;
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pub type CPLDType = CPLD<
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stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
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stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
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>;
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pub type IoUpdateType = stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>;
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pub type SpiType = stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1, u8>;
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pub type PartsType = firmware::spi_slave::Parts<
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'static,
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firmware::cpld::CPLD<
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stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
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stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
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>,
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stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
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stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
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stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
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>;
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// the program entry point
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#[entry]
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#[entry]
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fn main() -> ! {
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fn main() -> ! {
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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cp.DWT.enable_cycle_counter();
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// Initialise power...
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// Enable SRAM3 for the descriptor ring.
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dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
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let rcc = dp.RCC.constrain();
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let pwr = dp.PWR.constrain();
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let pwr = dp.PWR.constrain();
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let vos = pwr.freeze();
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let vos = pwr.freeze();
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let ccdr = rcc
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// Initialise SRAM3
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.sysclk(400.mhz())
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dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
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.hclk(200.mhz())
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.per_ck(100.mhz())
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.pll1_q_ck(48.mhz()) // for SPI
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.pll2_p_ck(100.mhz())
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.pll2_q_ck(100.mhz())
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.freeze(vos, &dp.SYSCFG);
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// Initialise clocks...
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let rcc = dp.RCC.constrain();
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let ccdr = rcc
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.sys_ck(200.mhz())
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.hclk(200.mhz())
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.pll1_r_ck(100.mhz()) // for TRACECK
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.pll1_q_ck(48.mhz()) // for SPI
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.freeze(vos, &dp.SYSCFG);
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// Get the delay provider.
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let delay = cp.SYST.delay(ccdr.clocks);
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// Initialise system...
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cp.SCB.invalidate_icache();
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cp.SCB.enable_icache();
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// TODO: ETH DMA coherence issues
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// cp.SCB.enable_dcache(&mut cp.CPUID);
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cp.DWT.enable_cycle_counter();
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// Initialise IO...
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
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let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
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let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
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let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
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let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
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let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
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let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
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let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
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let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
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let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
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// let mut link_led = gpiob.pb0.into_push_pull_output(); // LED1, green
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// let mut status_led = gpioe.pe1.into_push_pull_output(); // LD2, yellow
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// let mut listen_led = gpiob.pb14.into_push_pull_output(); // LD3, red
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// link_led.set_low().ok();
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// status_led.set_low().ok();
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// listen_led.set_low().ok();
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// Configure ethernet IO
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// Setup CDONE for checking
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{
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh);
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}
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// Configure ethernet
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match fpga_cdone.is_high() {
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let mut net_interface = {
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Ok(true) => hprintln!("FPGA is ready."),
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let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
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Ok(_) => hprintln!("FPGA is in reset state."),
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let (eth_dma, _eth_mac) = unsafe {
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Err(_) => hprintln!("Error: Cannot read C_DONE"),
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ethernet::ethernet_init(
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}.unwrap();
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dp.ETHERNET_MAC,
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dp.ETHERNET_MTL,
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// Setup Urukul
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dp.ETHERNET_DMA,
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/*
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&mut DES_RING,
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* Using SPI1, AF5
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mac_addr.clone(),
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* SCLK -> PA5
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)
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* MOSI -> PB5
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};
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* MISO -> PA6
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* CS -> 0: PB12, 1: PA15, 2: PC7
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*/
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unsafe { ethernet::enable_interrupt() }
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let store = unsafe { &mut NET_STORE };
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store.ip_addrs[0] = net::wire::IpCidr::new(net::wire::IpAddress::v4(192, 168, 1, 200), 24);
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let neighbor_cache = net::iface::NeighborCache::new(&mut store.neighbor_cache[..]);
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net::iface::EthernetInterfaceBuilder::new(eth_dma)
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.ethernet_addr(mac_addr)
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.neighbor_cache(neighbor_cache)
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.ip_addrs(&mut store.ip_addrs[..])
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.finalize()
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};
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/*
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* Using SPI1, AF5
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* SCLK -> PA5
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* MOSI -> PB5
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* MISO -> PA6
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* CS -> 0: PB12, 1: PA15, 2: PC7
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* I/O_Update -> PB15
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*/
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let sclk = gpioa.pa5.into_alternate_af5();
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let sclk = gpioa.pa5.into_alternate_af5();
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let mosi = gpiob.pb5.into_alternate_af5();
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let mosi = gpiob.pb5.into_alternate_af5();
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let miso = gpioa.pa6.into_alternate_af5();
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let miso = gpioa.pa6.into_alternate_af5();
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let (cs0, cs1, cs2) = (
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let (cs0, cs1, cs2) = (
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gpiob.pb12.into_push_pull_output(),
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gpiob.pb12.into_push_pull_output(),
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gpioa.pa15.into_push_pull_output(),
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gpioa.pa15.into_push_pull_output(),
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gpioc.pc7.into_push_pull_output(),
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gpioc.pc7.into_push_pull_output(),
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);
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);
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let io_update = gpiob.pb15.into_push_pull_output();
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/*
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* I/O_Update -> PB15
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*/
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let io_update = gpiob.pb15.into_push_pull_output();
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|
|
||||||
let spi = dp.SPI1.spi(
|
let spi = dp.SPI1.spi(
|
||||||
(sclk, miso, mosi),
|
(sclk, miso, mosi),
|
||||||
|
@ -199,63 +186,201 @@ fn main() -> ! {
|
||||||
&ccdr.clocks,
|
&ccdr.clocks,
|
||||||
);
|
);
|
||||||
|
|
||||||
let cpld = CPLD::new(spi, (cs0, cs1, cs2), io_update);
|
let switch = CPLD::new(spi, (cs0, cs1, cs2), io_update);
|
||||||
let parts = cpld.split();
|
let parts = switch.split();
|
||||||
|
let mut urukul = Urukul::new(
|
||||||
let urukul = Urukul::new(
|
|
||||||
parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7,
|
parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7,
|
||||||
[25_000_000, 25_000_000, 25_000_000, 25_000_000]
|
[25_000_000, 25_000_000, 25_000_000, 25_000_000]
|
||||||
);
|
);
|
||||||
|
|
||||||
cp.SCB.enable_icache();
|
// Setup ethernet pins
|
||||||
|
setup_ethernet_pins(
|
||||||
|
gpioa.pa1, gpioa.pa2, gpioc.pc1, gpioa.pa7, gpioc.pc4,
|
||||||
|
gpioc.pc5, gpiog.pg11, gpiog.pg13, gpiob.pb13
|
||||||
|
);
|
||||||
|
|
||||||
let mut time: u32 = 0;
|
// Initialise ethernet...
|
||||||
let mut next_ms = Instant::now();
|
assert_eq!(ccdr.clocks.hclk().0, 200_000_000); // HCLK 200MHz
|
||||||
|
assert_eq!(ccdr.clocks.pclk1().0, 100_000_000); // PCLK 100MHz
|
||||||
|
assert_eq!(ccdr.clocks.pclk2().0, 100_000_000); // PCLK 100MHz
|
||||||
|
assert_eq!(ccdr.clocks.pclk4().0, 100_000_000); // PCLK 100MHz
|
||||||
|
|
||||||
next_ms += 400_00.cycles();
|
let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
|
||||||
|
let (_eth_dma, mut eth_mac) = unsafe {
|
||||||
|
ethernet::ethernet_init(
|
||||||
|
dp.ETHERNET_MAC,
|
||||||
|
dp.ETHERNET_MTL,
|
||||||
|
dp.ETHERNET_DMA,
|
||||||
|
&mut DES_RING,
|
||||||
|
mac_addr.clone(),
|
||||||
|
)
|
||||||
|
};
|
||||||
|
unsafe {
|
||||||
|
ethernet::enable_interrupt();
|
||||||
|
cp.NVIC.set_priority(stm32::Interrupt::ETH, 196); // Mid prio
|
||||||
|
cortex_m::peripheral::NVIC::unmask(stm32::Interrupt::ETH);
|
||||||
|
}
|
||||||
|
|
||||||
let mut socket_set_entries: [_; 8] = Default::default();
|
// ----------------------------------------------------------
|
||||||
let mut sockets = net::socket::SocketSet::new(&mut socket_set_entries[..]);
|
// Begin periodic tasks
|
||||||
add_socket!(sockets, rx_storage, tx_storage);
|
|
||||||
|
|
||||||
let tcp_stack = NetworkStack::new(&mut net_interface, sockets);
|
systick_init(&mut delay.free(), ccdr.clocks);
|
||||||
let mut client = MqttClient::<consts::U256, _>::new(
|
unsafe {
|
||||||
IpAddr::V4(Ipv4Addr::new(192, 168, 1, 125)),
|
cp.SCB.shpr[15 - 4].write(128);
|
||||||
"nucleo",
|
} // systick exception priority
|
||||||
tcp_stack,
|
|
||||||
)
|
// ----------------------------------------------------------
|
||||||
.unwrap();
|
// Main application loop
|
||||||
|
|
||||||
|
// Setup addresses, maybe not MAC?
|
||||||
|
// MAC is set up in prior
|
||||||
|
let local_addr = IpAddress::v4(192, 168, 1, 200);
|
||||||
|
let mut ip_addrs = [IpCidr::new(local_addr, 24)];
|
||||||
|
|
||||||
|
// let neighbor_cache = NeighborCache::new(BTreeMap::new());
|
||||||
|
let mut neighbor_storage = [None; 16];
|
||||||
|
let neighbor_cache = NeighborCache::new(&mut neighbor_storage[..]);
|
||||||
|
|
||||||
|
// Routes
|
||||||
|
let default_v4_gw = Ipv4Address::new(192, 168, 1, 1);
|
||||||
|
let mut routes_storage = [None; 8];
|
||||||
|
let mut routes = Routes::new(&mut routes_storage[..]);
|
||||||
|
routes.add_default_ipv4_route(default_v4_gw).unwrap();
|
||||||
|
|
||||||
|
// Device? _eth_dma, as it implements phy::device
|
||||||
|
let mut iface = EthernetInterfaceBuilder::new(_eth_dma)
|
||||||
|
.ethernet_addr(mac_addr)
|
||||||
|
.neighbor_cache(neighbor_cache)
|
||||||
|
.ip_addrs(&mut ip_addrs[..])
|
||||||
|
.routes(routes)
|
||||||
|
.finalize();
|
||||||
|
|
||||||
|
// SCPI configs
|
||||||
|
// Device was declared in prior
|
||||||
|
|
||||||
|
// let mut errors = ArrayErrorQueue::<[Error; 10]>::new();
|
||||||
|
// let mut context = Context::new(&mut urukul, &mut errors, TREE);
|
||||||
|
|
||||||
|
// //Response bytebuffer
|
||||||
|
// let mut buf = ArrayVecFormatter::<[u8; 256]>::new();
|
||||||
|
|
||||||
|
// SCPI configs END
|
||||||
|
|
||||||
|
// TCP socket
|
||||||
|
let server_socket = {
|
||||||
|
static mut server_rx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
||||||
|
static mut server_tx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
||||||
|
let server_rx_buffer = TcpSocketBuffer::new( unsafe { &mut server_rx_storage[..] } );
|
||||||
|
let server_tx_buffer = TcpSocketBuffer::new( unsafe { &mut server_tx_storage[..] } );
|
||||||
|
TcpSocket::new(server_rx_buffer, server_tx_buffer)
|
||||||
|
};
|
||||||
|
|
||||||
|
// Setup a silent socket
|
||||||
|
let client_socket = {
|
||||||
|
static mut client_rx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
||||||
|
static mut client_tx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
||||||
|
let client_rx_buffer = TcpSocketBuffer::new( unsafe { &mut client_rx_storage[..] } );
|
||||||
|
let client_tx_buffer = TcpSocketBuffer::new( unsafe { &mut client_tx_storage[..] } );
|
||||||
|
TcpSocket::new(client_rx_buffer, client_tx_buffer)
|
||||||
|
};
|
||||||
|
|
||||||
|
// Socket storage
|
||||||
|
let mut sockets_storage: [_; 2] = Default::default();
|
||||||
|
|
||||||
|
let mut socket_set = SocketSet::new(&mut sockets_storage[..]);
|
||||||
|
let server_handle = socket_set.add(server_socket);
|
||||||
|
let client_handle = socket_set.add(client_socket);
|
||||||
|
|
||||||
loop {
|
loop {
|
||||||
let tick = Instant::now() > next_ms;
|
let _time = TIME.load(Ordering::Relaxed);
|
||||||
|
match iface.poll(&mut socket_set, Instant::from_millis(_time as i64)) {
|
||||||
|
Ok(_) => {
|
||||||
|
// hprintln!("Ethernet up").unwrap();
|
||||||
|
},
|
||||||
|
Err(e) => {
|
||||||
|
hprintln!("Ethernet down!").unwrap();
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
if tick {
|
// Conenct to TCP server through port 49500
|
||||||
next_ms += 400_000.cycles();
|
{
|
||||||
time += 1;
|
let mut socket = socket_set.get::<TcpSocket>(server_handle);
|
||||||
|
if !socket.is_active() && !socket.is_listening(){
|
||||||
|
socket.listen(7777).unwrap();
|
||||||
|
hprintln!("Server listening").unwrap();
|
||||||
|
}
|
||||||
|
|
||||||
|
// hprintln!("listener state :{}", socket.state()).unwrap();
|
||||||
|
|
||||||
|
if socket.can_recv() {
|
||||||
|
hprintln!("{:?}", str::from_utf8(socket.recv(|data| {
|
||||||
|
(data.len(), data)
|
||||||
|
}).unwrap()).unwrap()).unwrap();
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if tick && (time % 1000) == 0 {
|
{
|
||||||
client
|
let mut socket = socket_set.get::<TcpSocket>(client_handle);
|
||||||
.publish("nucleo", "Hello, World!".as_bytes(), QoS::AtMostOnce, &[])
|
if !socket.is_open() || !socket.can_send() {
|
||||||
.unwrap();
|
socket.abort();
|
||||||
|
socket.close();
|
||||||
|
// hprintln!("reset state: {}", socket.state()).unwrap();
|
||||||
|
socket.connect((IpAddress::v4(192, 168, 1, 200), 1883),
|
||||||
|
(IpAddress::Unspecified, 45000)).unwrap();
|
||||||
|
// hprintln!("post connect state: {}", socket.state()).unwrap();
|
||||||
|
}
|
||||||
|
|
||||||
|
// hprintln!("client state: {}", socket.state()).unwrap();
|
||||||
|
|
||||||
|
if socket.can_send() {
|
||||||
|
socket.send_slice(b"regards from socket").unwrap();
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
client
|
|
||||||
.poll(|_client, topic, message, _properties| match topic {
|
|
||||||
_ => hprintln!("On '{:?}', received: {:?}", topic, message).unwrap(),
|
|
||||||
})
|
|
||||||
.unwrap();
|
|
||||||
|
|
||||||
// Update the TCP stack.
|
|
||||||
let sleep = client.network_stack.update(time);
|
|
||||||
if sleep {
|
|
||||||
//cortex_m::asm::wfi();
|
|
||||||
cortex_m::asm::nop();
|
|
||||||
}
|
|
||||||
|
|
||||||
match client.is_connected() {
|
|
||||||
true => hprintln!("Connected"),
|
|
||||||
false => hprintln!("No Connection"),
|
|
||||||
}.unwrap();
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
use stm32h7xx_hal::gpio::{
|
||||||
|
gpioa::{PA1, PA2, PA7},
|
||||||
|
gpiob::{PB13},
|
||||||
|
gpioc::{PC1, PC4, PC5},
|
||||||
|
gpiog::{PG11, PG13},
|
||||||
|
Speed::VeryHigh,
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Migrated ethernet setup pins
|
||||||
|
*/
|
||||||
|
pub fn setup_ethernet_pins<REF_CLK, MDIO, MDC, CRS_DV, RXD0, RXD1, TX_EN, TXD0, TXD1>(
|
||||||
|
pa1: PA1<REF_CLK>, pa2: PA2<MDIO>, pc1: PC1<MDC>, pa7: PA7<CRS_DV>, pc4: PC4<RXD0>,
|
||||||
|
pc5: PC5<RXD1>, pg11: PG11<TX_EN>, pg13: PG13<TXD0>, pb13: PB13<TXD1>
|
||||||
|
) {
|
||||||
|
pa1.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
pa2.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
pc1.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
pa7.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
pc4.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
pc5.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
pg11.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
pg13.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
pb13.into_alternate_af11().set_speed(VeryHigh);
|
||||||
|
}
|
||||||
|
|
||||||
|
#[interrupt]
|
||||||
|
fn ETH() {
|
||||||
|
unsafe { ethernet::interrupt_handler() }
|
||||||
|
}
|
||||||
|
|
||||||
|
#[exception]
|
||||||
|
fn SysTick() {
|
||||||
|
TIME.fetch_add(1, Ordering::Relaxed);
|
||||||
|
}
|
||||||
|
|
||||||
|
#[exception]
|
||||||
|
fn HardFault(ef: &cortex_m_rt::ExceptionFrame) -> ! {
|
||||||
|
panic!("HardFault at {:#?}", ef);
|
||||||
|
}
|
||||||
|
|
||||||
|
#[exception]
|
||||||
|
fn DefaultHandler(irqn: i16) {
|
||||||
|
panic!("Unhandled exception (IRQn = {})", irqn);
|
||||||
|
}
|
||||||
|
|
Loading…
Reference in New Issue