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refactor(website): Updates sinara core

pull/49/head
sovanna 2019-07-18 15:50:50 +02:00
parent 8155ff5e2c
commit a3cfb52268
2 changed files with 13 additions and 18 deletions
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25
content/experiment-control/sinara-core.md
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@ -154,22 +154,17 @@ A low-noise clock distribution module that can be used to distribute low jitter
{% end %} {% end %}
{% layoutlr1() %} {% layoutsmall(title="Purchasing Sinara hardware") %}
<p class="mb-5">
<div class="col-12 col-md-6">
<h5>Purchasing Sinara hardware</h5>
<p>
Kasli and EEMs can be ordered now. We can deliver a rack-mountable crate that contains all the cards, is fully tested, and is ready to be connected to your experiment and computer network. Kasli and EEMs can be ordered now. We can deliver a rack-mountable crate that contains all the cards, is fully tested, and is ready to be connected to your experiment and computer network.
<br><br> <br><br>
Contact sales@m-***s.hk with your requirements and we will establish a quote. Contact sales@m-***s.hk with your requirements and we will establish a quote.
</p> </p>
</div> {% end %}
<div class="col-12 col-md-6">
<h5>Metlino and Sayma</h5> {% layoutsmall(title="Metlino and Sayma") %}
<p> <p>
For more demanding experiments, we have been developing the Metlino and Sayma system. One Sayma card includes 8 channels of 2.4GSPS 16-bit DACs and a Kintex Ultrascale FPGA. The FPGA synthesizes waveforms for the DACs and our gateware supports two-tone direct digital synthesis and shaping of the waveform parameters with splines. Multiple Sayma cards can be installed in a MicroTCA chassis together with one Metlino master. Clock synchronization will be supported. For more demanding experiments, we have been developing the Metlino and Sayma system. One Sayma card includes 8 channels of 2.4GSPS 16-bit DACs and a Kintex Ultrascale FPGA. The FPGA synthesizes waveforms for the DACs and our gateware supports two-tone direct digital synthesis and shaping of the waveform parameters with splines. Multiple Sayma cards can be installed in a MicroTCA chassis together with one Metlino master. Clock synchronization will be supported.
</p> </p>
</div>
{% end %} {% end %}

2
templates/_base.html
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@ -3,7 +3,7 @@
<html lang="en"> <html lang="en">
<head> <head>
<title>{% block title%}{{ config.title }}{% endblock %}</title> <title>{% if page and page.title %}{{ page.title }} |{% endif %} {% block title%}{{ config.title }}{% endblock %}</title>
<meta name="description" content="{% block description%}{{ config.description }}{% endblock %}"> <meta name="description" content="{% block description%}{{ config.description }}{% endblock %}">
<meta charset="utf-8"> <meta charset="utf-8">
<meta http-equiv="X-UA-Compatible" content="IE=edge"> <meta http-equiv="X-UA-Compatible" content="IE=edge">