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<div id="column-content">
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<div id="content">
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<a name="top" id="top"></a>
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<h1 id="firstHeading" class="firstHeading">LM32 documentation errata</h1>
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<h3 id="siteSub">From Milkymist Wiki</h3>
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<div id="jump-to-nav">Jump to: <a href="index.php%3Ftitle=LM32_documentation_errata.html#column-one">navigation</a>, <a href="index.php%3Ftitle=LM32_documentation_errata.html#searchInput">search</a></div> <!-- start content -->
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<table id="toc" class="toc" summary="Contents"><tr><td><div id="toctitle"><h2>Contents</h2></div>
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<ul>
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<li class="toclevel-1"><a href="index.php%3Ftitle=LM32_documentation_errata.html#Fields_of_the_CFG_CSR"><span class="tocnumber">1</span> <span class="toctext">Fields of the CFG CSR</span></a></li>
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<li class="toclevel-1"><a href="index.php%3Ftitle=LM32_documentation_errata.html#EID_register"><span class="tocnumber">2</span> <span class="toctext">EID register</span></a></li>
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<li class="toclevel-1"><a href="index.php%3Ftitle=LM32_documentation_errata.html#Verilog_configuration_options"><span class="tocnumber">3</span> <span class="toctext">Verilog configuration options</span></a></li>
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<li class="toclevel-1"><a href="index.php%3Ftitle=LM32_documentation_errata.html#Cache_associativity"><span class="tocnumber">4</span> <span class="toctext">Cache associativity</span></a></li>
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<li class="toclevel-1"><a href="index.php%3Ftitle=LM32_documentation_errata.html#RAISE.2FSCALL_instruction"><span class="tocnumber">5</span> <span class="toctext">RAISE/SCALL instruction</span></a></li>
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</ul>
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</td></tr></table><script type="text/javascript"> if (window.showTocToggle) { var tocShowText = "show"; var tocHideText = "hide"; showTocToggle(); } </script>
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<a name="Fields_of_the_CFG_CSR" id="Fields_of_the_CFG_CSR"></a><h2><span class="editsection">[<a href="http://milkymist.org/wiki/index.php?title=LM32_documentation_errata&action=edit&section=1" title="Edit section: Fields of the CFG CSR">edit</a>]</span> <span class="mw-headline"> Fields of the CFG CSR </span></h2>
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<table border="1">
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<tr>
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<th> Document
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</th><td> LatticeMico32 Processor Reference Manual v8.0
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</td></tr>
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<tr>
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<th> Page(s)
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</th><td> 12-13
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</td></tr>
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<tr>
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<th> Description
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</th><td> Bit 3 should be the X field, and bit 4 should be the U field. The U field means that the CPU has user instructions (the documentation says it's "reserved"). "G" bit '1 = data cache is implemented'. This is incorrect -- the G big actually indicates whether debug is implemented.
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</td></tr>
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</table>
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<a name="EID_register" id="EID_register"></a><h2><span class="editsection">[<a href="http://milkymist.org/wiki/index.php?title=LM32_documentation_errata&action=edit&section=2" title="Edit section: EID register">edit</a>]</span> <span class="mw-headline"> EID register </span></h2>
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<table border="1">
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<tr>
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<th> Document
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</th><td> LatticeMico32 Processor Reference Manual v8.0
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</td></tr>
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<tr>
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<th> Page(s)
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</th><td> 9, table 4
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</td></tr>
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<tr>
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<th> Description
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</th><td> EID is described as the LM32 Revision Number. Later text describes this as the "Exception ID", which seems to fit better -- the LM32 Revision is accessible as part of the CFG CSR.
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</td></tr>
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</table>
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<a name="Verilog_configuration_options" id="Verilog_configuration_options"></a><h2><span class="editsection">[<a href="http://milkymist.org/wiki/index.php?title=LM32_documentation_errata&action=edit&section=3" title="Edit section: Verilog configuration options">edit</a>]</span> <span class="mw-headline"> Verilog configuration options </span></h2>
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<table border="1">
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<tr>
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<th> Document
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</th><td> LatticeMico32 Processor Reference Manual v8.0
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</td></tr>
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<tr>
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<th> Page(s)
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</th><td> 35, table 16
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</td></tr>
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<tr>
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<th> Description
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</th><td> Configuration options have had the CFG_ prefix dropped with no note of this. Either prefix the config options with CFG_, or make a note to this effect in the text. Furthermore, DIVIDE_ENABLED is actually called MC_DIVIDE_ENABLED.
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</td></tr>
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</table>
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<a name="Cache_associativity" id="Cache_associativity"></a><h2><span class="editsection">[<a href="http://milkymist.org/wiki/index.php?title=LM32_documentation_errata&action=edit&section=4" title="Edit section: Cache associativity">edit</a>]</span> <span class="mw-headline"> Cache associativity </span></h2>
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<table border="1">
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<tr>
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<th> Document
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</th><td> LatticeMico32 Processor Reference Manual v8.0
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</td></tr>
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<tr>
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<th> Page(s)
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</th><td> 37, table 16
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</td></tr>
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<tr>
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<th> Description
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</th><td> ICACHE_Associativity and DCACHE_Associativity do not explain clearly what is meant by "associativity" -- in this case, 1=Direct Mapped, 2=two-way set-associative.
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</td></tr>
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</table>
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<a name="RAISE.2FSCALL_instruction" id="RAISE.2FSCALL_instruction"></a><h2><span class="editsection">[<a href="http://milkymist.org/wiki/index.php?title=LM32_documentation_errata&action=edit&section=5" title="Edit section: RAISE/SCALL instruction">edit</a>]</span> <span class="mw-headline"> RAISE/SCALL instruction </span></h2>
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<table border="1">
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<tr>
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<th> Document
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</th><td> LatticeMico32 Processor Reference Manual v8.0
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</td></tr>
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<tr>
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<th> Page(s)
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</th><td> 50/77
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</td></tr>
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<tr>
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<th> Description
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</th><td> RAISE instruction (p.50, opcode 101011) is listed in the Instruction Descriptions as "SCALL" (p. 77). There is no indication which of these names is correct.
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</td></tr>
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</table>
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