bors[bot] 32eba6c1ea Merge #23 ... 23: Add fcsr register r=dvc94ch a=Disasm Co-authored-by: Vadim Kaushan <admin@disasm.info>		2019-03-17 18:47:24 +00:00
..
register	Add fcsr register	2019-03-17 19:06:29 +03:00
asm.rs	Update docs	2019-01-24 17:20:23 +03:00
interrupt.rs	Simplify #[cfg()] predicate expressions	2019-01-23 01:29:54 +03:00
lib.rs	Add MSRV policy	2019-03-17 17:29:48 +03:00