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Fork of the riscv crate to support vexriscv
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David Craven 6ebb6f9790
Bump version to 0.1.1 		2017-11-18 09:45:01 +01:00
src Allow compiling on x86_64 for publishing. 2017-11-18 08:46:19 +01:00
.gitignore Initial commit. 2017-09-19 16:23:35 +02:00
Cargo.toml Bump version to 0.1.1 2017-11-18 09:45:01 +01:00
README.md Initial commit. 2017-09-19 16:23:35 +02:00

README.md

riscv

Low level access to RISCV processors

License

Copyright 2017 David Craven

Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above copyright notice and this permission notice appear in all copies.

THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.