4 Commits

Author	SHA1	Message	Date
Sebastien Bourdeauducq	b53e0a5cd2	add riscv32i target	2019-07-26 00:13:38 +08:00
Vadim Kaushan	a659a0cc39	Declare all the CSR registers in asm.S	2019-06-25 23:33:40 +03:00
Vadim Kaushan	427c3b9035	Generate binaries for 64-bit targets	2019-03-01 17:00:36 +03:00
Vadim Kaushan	a51143d366	Implement asm functions	2019-01-23 01:29:54 +03:00