From 41378757c0529b4cce532cc4e76f9b7ca56f8344 Mon Sep 17 00:00:00 2001 From: Vadim Kaushan Date: Sat, 22 Dec 2018 10:32:52 +0100 Subject: [PATCH] Do not require const-fn and asm features --- Cargo.toml | 1 + ci/script.sh | 2 +- src/asm.rs | 23 ++++++---- src/lib.rs | 3 +- src/register/macros.rs | 95 +++++++++++++++++++++++++----------------- 5 files changed, 75 insertions(+), 49 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 0365b93..683f51a 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -13,4 +13,5 @@ bare-metal = "0.2.0" bit_field = "0.9.0" [features] +const-fn = ["bare-metal/const-fn"] inline-asm = [] \ No newline at end of file diff --git a/ci/script.sh b/ci/script.sh index eb1a313..dde6273 100644 --- a/ci/script.sh +++ b/ci/script.sh @@ -4,7 +4,7 @@ main() { cargo check --target $TARGET if [ $TRAVIS_RUST_VERSION = nightly ]; then - cargo check --target $TARGET --features inline-asm + cargo check --target $TARGET --features 'const-fn inline-asm' fi } diff --git a/src/asm.rs b/src/asm.rs index 389146d..d258383 100644 --- a/src/asm.rs +++ b/src/asm.rs @@ -5,8 +5,12 @@ macro_rules! instruction { #[inline] pub unsafe fn $fnname() { match () { - #[cfg(riscv)] + #[cfg(all(riscv, feature = "inline-asm"))] () => asm!($asm :::: "volatile"), + + #[cfg(all(riscv, not(feature = "inline-asm")))] + () => unimplemented!(), + #[cfg(not(riscv))] () => unimplemented!(), } @@ -22,11 +26,16 @@ instruction!(sfence_vma_all, "sfence.vma"); #[inline] -#[cfg(riscv)] +#[allow(unused_variables)] pub unsafe fn sfence_vma(asid: usize, addr: usize) { - asm!("sfence.vma $0, $1" :: "r"(asid), "r"(addr) :: "volatile"); -} + match () { + #[cfg(all(riscv, feature = "inline-asm"))] + () => asm!("sfence.vma $0, $1" :: "r"(asid), "r"(addr) :: "volatile"), -#[inline] -#[cfg(not(riscv))] -pub fn sfence_vma(_asid: usize, _addr: usize) {} + #[cfg(all(riscv, not(feature = "inline-asm")))] + () => unimplemented!(), + + #[cfg(not(riscv))] + () => unimplemented!(), + } +} diff --git a/src/lib.rs b/src/lib.rs index aa952cf..a73ed12 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -8,8 +8,7 @@ #![no_std] #![deny(warnings)] -#![feature(asm)] -#![feature(const_fn)] +#![cfg_attr(feature = "inline-asm", feature(asm))] extern crate bare_metal; extern crate bit_field; diff --git a/src/register/macros.rs b/src/register/macros.rs index ec0e1e1..7520584 100644 --- a/src/register/macros.rs +++ b/src/register/macros.rs @@ -2,17 +2,21 @@ macro_rules! read_csr { ($csr_number:expr) => { /// Reads the CSR #[inline] - #[cfg(riscv)] unsafe fn _read() -> usize { - let r: usize; - asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile"); - r - } + match () { + #[cfg(all(riscv, feature = "inline-asm"))] + () => { + let r: usize; + asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile"); + r + } - #[inline] - #[cfg(not(riscv))] - unsafe fn _read() -> usize { - unimplemented!() + #[cfg(all(riscv, not(feature = "inline-asm")))] + () => unimplemented!(), + + #[cfg(not(riscv))] + () => unimplemented!(), + } } }; } @@ -21,17 +25,21 @@ macro_rules! read_csr_rv32 { ($csr_number:expr) => { /// Reads the CSR #[inline] - #[cfg(riscv32)] unsafe fn _read() -> usize { - let r: usize; - asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile"); - r - } + match () { + #[cfg(all(riscv32, feature = "inline-asm"))] + () => { + let r: usize; + asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile"); + r + } - #[inline] - #[cfg(not(riscv32))] - unsafe fn _read() -> usize { - unimplemented!() + #[cfg(all(riscv32, not(feature = "inline-asm")))] + () => unimplemented!(), + + #[cfg(not(riscv32))] + () => unimplemented!(), + } } }; } @@ -76,15 +84,18 @@ macro_rules! write_csr { ($csr_number:expr) => { /// Writes the CSR #[inline] - #[cfg(riscv)] + #[allow(unused_variables)] unsafe fn _write(bits: usize) { - asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"); - } + match () { + #[cfg(all(riscv, feature = "inline-asm"))] + () => asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), - #[inline] - #[cfg(not(riscv))] - unsafe fn _write(_bits: usize) { - unimplemented!() + #[cfg(all(riscv, not(feature = "inline-asm")))] + () => unimplemented!(), + + #[cfg(not(riscv))] + () => unimplemented!(), + } } }; } @@ -105,15 +116,18 @@ macro_rules! set { ($csr_number:expr) => { /// Set the CSR #[inline] - #[cfg(riscv)] + #[allow(unused_variables)] unsafe fn _set(bits: usize) { - asm!("csrrs x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"); - } + match () { + #[cfg(all(riscv, feature = "inline-asm"))] + () => asm!("csrrs x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), - #[inline] - #[cfg(not(riscv))] - unsafe fn _set(_bits: usize) { - unimplemented!() + #[cfg(all(riscv, not(feature = "inline-asm")))] + () => unimplemented!(), + + #[cfg(not(riscv))] + () => unimplemented!(), + } } }; } @@ -122,15 +136,18 @@ macro_rules! clear { ($csr_number:expr) => { /// Clear the CSR #[inline] - #[cfg(riscv)] + #[allow(unused_variables)] unsafe fn _clear(bits: usize) { - asm!("csrrc x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"); - } + match () { + #[cfg(all(riscv, feature = "inline-asm"))] + () => asm!("csrrc x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), - #[inline] - #[cfg(not(riscv))] - unsafe fn _clear(_bits: usize) { - unimplemented!() + #[cfg(all(riscv, not(feature = "inline-asm")))] + () => unimplemented!(), + + #[cfg(not(riscv))] + () => unimplemented!(), + } } }; }