ad5680: keep sync high for 1ms

src/ad5680.rs

@@ -6,6 +6,7 @@ use stm32f4xx_hal::{
     time::MegaHertz,
     spi,
 };
+use crate::timer::sleep;
 
 /// SPI Mode 1
 pub const SPI_MODE: spi::Mode = spi::Mode {
@@ -33,23 +34,23 @@ impl<SPI: Transfer<u8>, S: OutputPin> Dac<SPI, S> {
         }
     }
 
-    fn write(&mut self, mut buf: [u8; 3]) -> Result<(), SPI::Error> {
+    fn write(&mut self, buf: &mut [u8]) -> Result<(), SPI::Error> {
         // pulse sync to start a new transfer. leave sync idle low
         // afterwards to save power as recommended per datasheet.
         let _ = self.sync.set_high();
-        cortex_m::asm::nop();
+        // must be high for >= 33 ns
+        sleep(1);
         let _ = self.sync.set_low();
-
+        self.spi.transfer(buf)?;
-        self.spi.transfer(&mut buf)?;
         Ok(())
     }
 
     pub fn set(&mut self, value: u32) -> Result<(), SPI::Error> {
-        let buf = [
+        let mut buf = [
             (value >> 14) as u8,
             (value >> 6) as u8,
             (value << 2) as u8,
         ];
-        self.write(buf)
+        self.write(&mut buf)
     }
 }

src/main.rs

@@ -89,16 +89,17 @@ fn main() -> ! {
     wd.start(WATCHDOG_INTERVAL.ms());
     wd.feed();
 
+    timer::setup(cp.SYST, clocks);
+
     let pins = Pins::setup(
         clocks, dp.TIM1, dp.TIM3,
         dp.GPIOA, dp.GPIOB, dp.GPIOC, dp.GPIOE, dp.GPIOF, dp.GPIOG,
         dp.SPI2, dp.SPI4, dp.SPI5,
-        dp.ADC1, dp.ADC2, dp.ADC3,
+        dp.ADC1,
     );
     let mut channels = Channels::new(pins);
     channels.calibrate_dac_value(0);
 
-    timer::setup(cp.SYST, clocks);
 
     #[cfg(not(feature = "generate-hwaddr"))]
     let hwaddr = EthernetAddress(NET_HWADDR);

src/timer.rs

@@ -39,3 +39,10 @@ pub fn now() -> u32 {
             .deref()
     })
 }
+
+/// block for at least `amount` milliseconds
+fn sleep(amount: u32) {
+    use crate::timer::now;
+    let start = now();
+    while now() - start <= amount {}
+}