M-Labs
/
sinara-systems-legacy
8
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

innsbruck4, ubirmingham2: normalize indent

master
Robert Jördens 2020-11-26 15:55:11 +01:00
parent 9756995ec9
commit adc2fa5193
2 changed files with 45 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
innsbruck4.json
View File

@ -8,22 +8,21 @@
"core_addr": "10.34.16.100", "core_addr": "10.34.16.100",
"vendor": "QUARTIQ", "vendor": "QUARTIQ",
"peripherals": [ "peripherals": [
{ {
"type": "dio", "type": "dio",
"board": "DIO_SMA", "board": "DIO_SMA",
"ports": [0], "ports": [0],
"hw_rev": "v1.1", "hw_rev": "v1.1",
"bank_direction_low": "input", "bank_direction_low": "input",
"bank_direction_high": "output" "bank_direction_high": "output"
}, },
{ {
"type": "dio", "type": "dio",
"board": "DIO_SMA", "board": "DIO_SMA",
"ports": [1], "ports": [1],
"hw_rev": "v1.1", "hw_rev": "v1.1",
"bank_direction_low": "output", "bank_direction_low": "output",
"bank_direction_high": "output" "bank_direction_high": "output"
}, },
{ {
"type": "sampler", "type": "sampler",
@ -31,18 +30,18 @@
"ports": [2, 3] "ports": [2, 3]
}, },
{ {
"type": "urukul", "type": "urukul",
"hw_rev": "v1.5", "hw_rev": "v1.5",
"ports": [4, 5], "ports": [4, 5],
"clk_sel": 2, "clk_sel": 2,
"synchronization": true "synchronization": true
}, },
{ {
"type": "urukul", "type": "urukul",
"hw_rev": "v1.5", "hw_rev": "v1.5",
"ports": [6, 7], "ports": [6, 7],
"clk_sel": 2, "clk_sel": 2,
"synchronization": true "synchronization": true
} }
] ]
} }

47
ubirmingham2.json
View File

@ -8,22 +8,21 @@
"core_addr": "10.34.16.100", "core_addr": "10.34.16.100",
"vendor": "QUARTIQ", "vendor": "QUARTIQ",
"peripherals": [ "peripherals": [
{ {
"type": "dio", "type": "dio",
"board": "DIO_SMA", "board": "DIO_SMA",
"ports": [0], "ports": [0],
"hw_rev": "v1.1", "hw_rev": "v1.1",
"bank_direction_low": "input", "bank_direction_low": "input",
"bank_direction_high": "output" "bank_direction_high": "output"
}, },
{ {
"type": "dio", "type": "dio",
"board": "DIO_SMA", "board": "DIO_SMA",
"ports": [1], "ports": [1],
"hw_rev": "v1.1", "hw_rev": "v1.1",
"bank_direction_low": "output", "bank_direction_low": "output",
"bank_direction_high": "output" "bank_direction_high": "output"
}, },
{ {
"type": "sampler", "type": "sampler",
@ -31,19 +30,19 @@
"ports": [2, 3] "ports": [2, 3]
}, },
{ {
"type": "urukul", "type": "urukul",
"hw_rev": "v1.4", "hw_rev": "v1.4",
"variant": "AD9912", "variant": "AD9912",
"ports": [4, 5], "ports": [4, 5],
"dds": "ad9912", "dds": "ad9912",
"clk_sel": 2 "clk_sel": 2
}, },
{ {
"type": "urukul", "type": "urukul",
"hw_rev": "v1.5", "hw_rev": "v1.5",
"ports": [6, 7], "ports": [6, 7],
"clk_sel": 2, "clk_sel": 2,
"synchronization": true "synchronization": true
}, },
{ {
"type": "zotino", "type": "zotino",