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illinois: enable Urukul sync, style

master
Harry Ho 2021-10-20 11:10:18 +08:00
parent a4cd895992
commit 9f79a7464a
1 changed files with 9 additions and 3 deletions
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12
illinois.json
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@ -12,24 +12,28 @@
}, },
{ {
"type": "dio", "type": "dio",
"board": "DIO_RJ45",
"ports": [4], "ports": [4],
"bank_direction_low": "output", "bank_direction_low": "output",
"bank_direction_high": "output" "bank_direction_high": "output"
}, },
{ {
"type": "dio", "type": "dio",
"board": "DIO_RJ45",
"ports": [3], "ports": [3],
"bank_direction_low": "output", "bank_direction_low": "output",
"bank_direction_high": "output" "bank_direction_high": "output"
}, },
{ {
"type": "dio", "type": "dio",
"board": "DIO_SMA",
"ports": [5], "ports": [5],
"bank_direction_low": "input", "bank_direction_low": "input",
"bank_direction_high": "output" "bank_direction_high": "output"
}, },
{ {
"type": "dio", "type": "dio",
"board": "DIO_SMA",
"ports": [6], "ports": [6],
"bank_direction_low": "output", "bank_direction_low": "output",
"bank_direction_high": "output" "bank_direction_high": "output"
@ -38,17 +42,19 @@
"type": "urukul", "type": "urukul",
"dds": "ad9910", "dds": "ad9910",
"ports": [7, 8], "ports": [7, 8],
"clk_sel": 2 "clk_sel": 2,
"synchronization": true
}, },
{ {
"type": "urukul", "type": "urukul",
"dds": "ad9910", "dds": "ad9910",
"ports": [9, 10], "ports": [9, 10],
"clk_sel": 2 "clk_sel": 2,
"synchronization": true
}, },
{ {
"type": "zotino", "type": "zotino",
"ports": [11] "ports": [11]
} }
] ]
} }