M-Labs
/
sinara-systems-legacy
8
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

ucsb: ttl4-7 becomes output, ext ref, add 1xTTL & 3xUrukul9910

master
Harry Ho 2021-03-25 14:12:42 +08:00
parent 235a4f0ffd
commit 2a9d3953a4
1 changed files with 28 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
ucsb.json
View File

@ -5,19 +5,44 @@
"hw_rev": "v2.0", "hw_rev": "v2.0",
"base": "standalone", "base": "standalone",
"core_addr": "192.168.1.75", "core_addr": "192.168.1.75",
"ext_ref_frequency": 125e6,
"peripherals": [ "peripherals": [
{ {
"type": "dio", "type": "dio",
"ports": [0], "ports": [0],
"bank_direction_low": "input", "bank_direction_low": "input",
"bank_direction_high": "input", "bank_direction_high": "output"
},
{
"type": "dio",
"ports": [1],
"bank_direction_low": "input",
"bank_direction_high": "output",
"edge_counter": true "edge_counter": true
}, },
{ {
"type": "urukul", "type": "urukul",
"dds": "ad9910", "dds": "ad9910",
"ports": [1, 2], "ports": [2, 3],
"clk_sel": 2
},
{
"type": "urukul",
"dds": "ad9910",
"ports": [4, 5],
"clk_sel": 2
},
{
"type": "urukul",
"dds": "ad9910",
"ports": [6, 7],
"clk_sel": 2
},
{
"type": "urukul",
"dds": "ad9910",
"ports": [8, 9],
"clk_sel": 2 "clk_sel": 2
} }
] ]
} }