add ucla2

master
Zheng-Jiakun 2021-08-19 09:51:23 +08:00
parent 7343fdddde
commit 2714a5695b
1 changed files with 55 additions and 0 deletions

55
ucla2.json Normal file
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{
"target": "kasli",
"min_artiq_version": "6.0",
"variant": "ucla2",
"hw_rev": "v2.0",
"base": "standalone",
"core_addr": "192.168.1.75",
"peripherals": [
{
"type": "grabber",
"ports": [0]
},
{
"type": "dio",
"board": "DIO_BNC",
"hw_rev": "v1.4",
"ports": [1],
"bank_direction_low": "input",
"bank_direction_high": "output"
},
{
"type": "dio",
"board": "DIO_BNC",
"hw_rev": "v1.4",
"ports": [2],
"bank_direction_low": "output",
"bank_direction_high": "output"
},
{
"type": "dio",
"board": "DIO_BNC",
"hw_rev": "v1.4",
"ports": [3],
"bank_direction_low": "output",
"bank_direction_high": "output"
},
{
"type": "suservo",
"sampler_ports": [10, 11],
"urukul0_ports": [4, 5],
"urukul1_ports": [6, 7],
"clk_sel": 2
},
{
"type": "phaser",
"ports": [8],
"clk_sel": 2
},
{
"type": "fastino",
"hw_rev": "v1.1",
"ports": [9]
}
]
}