Restructure rtio.sed.output_driver to follow nMigen convention
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@ -30,10 +30,10 @@ $ python -m rtio.test.sed.output_network
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- - [ ] `rtio.cri` (`Interface` and `CRIDecoder` only)
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- - [x] `rtio.sed.output_network` - Sorting network (high priority)
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- - [ ] `rtio.sed.output_driver`
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- [ ] Restructure to code to follow nMigen convention and re-validate existing assertions (if any)
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- [x] Restructure to code to follow nMigen convention and re-validate existing assertions (if any)
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- - [x] `rtio.cri` (`Interface` and `CRIDecoder` only)
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- - [x] `rtio.sed.output_network`
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- - [ ] `rtio.sed.output_driver`
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- - [x] `rtio.sed.output_driver`
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## License
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@ -10,8 +10,11 @@ __all__ = ["OutputDriver"]
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class OutputDriver(Elaboratable):
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def __init__(self, channels, glbl_fine_ts_width, lane_count, seqn_width):
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m = Module()
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self.m = m
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self.channels = channels
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self.glbl_fine_ts_width = glbl_fine_ts_width
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self.lane_count = lane_count
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self.seqn_width = seqn_width
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self.collision = Signal()
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self.collision_channel = Signal(range(len(channels)), reset_less=True)
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self.busy = Signal()
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@ -19,9 +22,8 @@ class OutputDriver(Elaboratable):
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# output network
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layout_on_payload = layouts.output_network_payload(channels, glbl_fine_ts_width)
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output_network = OutputNetwork(lane_count, seqn_width, layout_on_payload)
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m.submodules += output_network
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self.input = output_network.input
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self.output_network = OutputNetwork(lane_count, seqn_width, layout_on_payload)
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self.input = self.output_network.input
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# detect collisions (adds one pipeline stage)
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layout_lane_data = [
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@ -29,8 +31,22 @@ class OutputDriver(Elaboratable):
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("collision", 1),
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("payload", layout_on_payload)
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]
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lane_datas = [Record(layout_lane_data, reset_less=True) for _ in range(lane_count)]
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en_replaces = [channel.interface.o.enable_replace for channel in channels]
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self.lane_datas = [Record(layout_lane_data) for _ in range(lane_count)]
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for lane_data in self.lane_datas:
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lane_data.valid.reset_less = True
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lane_data.collision.reset_less = True
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lane_data.payload.reset_less = True
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self.en_replaces = [channel.interface.o.enable_replace for channel in channels]
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def elaborate(self, platform):
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m = Module()
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channels = self.channels
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output_network = self.output_network
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lane_datas = self.lane_datas
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en_replaces = self.en_replaces
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m.submodules += self.output_network
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for lane_data, on_output in zip(lane_datas, output_network.output):
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lane_data.valid.reset_less = False
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lane_data.collision.reset_less = False
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@ -67,7 +83,7 @@ class OutputDriver(Elaboratable):
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m.d.comb += selected.eq(lane_data.valid & ~lane_data.collision & (lane_data.payload.channel == n))
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onehot_stb.append(selected)
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if hasattr(lane_data.payload, "fine_ts") and hasattr(oif, "fine_ts"):
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ts_shift = len(lane_data.ayload.fine_ts) - len(oif.fine_ts)
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ts_shift = len(lane_data.payload.fine_ts) - len(oif.fine_ts)
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onehot_fine_ts.append(Mux(selected, lane_data.payload.fine_ts[ts_shift:], 0))
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if hasattr(lane_data.payload, "address"):
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onehot_address.append(Mux(selected, lane_datapayload.address, 0))
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@ -95,6 +111,4 @@ class OutputDriver(Elaboratable):
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m.d.sync += self.busy.eq(1)
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m.d.sync += self.busy_channel.eq(channel_r)
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def elaborate(self, platform):
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return self.m
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return m
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