Donald Sebastian Leung e3b124f4eb Fix minor bug in SRL instruction specification		2020-09-15 16:35:05 +08:00
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checks	Replace individual instruction checks with ISA check	2020-08-21 15:14:42 +08:00
cores	Tweak parameters for Minerva verification tasks	2020-09-15 15:44:02 +08:00
insns	Fix minor bug in SRL instruction specification	2020-09-15 16:35:05 +08:00
__init__.py	Modularize codebase	2020-08-17 11:50:53 +08:00