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@ -8,12 +8,12 @@ A port of [riscv-formal](https://github.com/SymbioticEDA/riscv-formal) to nMigen
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## Breakdown
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## Breakdown
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_This section is currently a work in progress._
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| Directory | Description |
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| Directory | Description |
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| --- | --- |
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| --- | --- |
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| `insns` | Supported RISC-V instructions and ISAs |
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| `rvfi` | RISC-V Formal Verification Framework (nMigen port) |
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| `cores` | Example cores to be integrated with riscv-formal-nmigen (WIP) |
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| `rvfi/insns` | Supported RISC-V instructions and ISAs |
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| `rvfi/cores` | Example cores to be integrated with riscv-formal-nmigen (WIP) |
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| `rvfi/cores/minerva` | The [Minerva](https://github.com/lambdaconcept/minerva) core |
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## Build
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## Build
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