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riscv-formal-nmigen
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Update README.md

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Donald Sebastian Leung 2020-08-10 16:47:09 +08:00
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@ -52,6 +52,12 @@ _Note: This section is under development and will be updated as more classes are
- `InsnSrai`: SRAI instruction
- `InsnRV32IIType`: RV32I I-Type Instruction
- `InsnJalr`: JALR instruction
- `InsnRV32IITypeLoad`: RV32I I-Type Instruction (Load Variation)
- `InsnLb`: LB instruction
- `InsnLh`: LH instruction
- `InsnLw`: LW instruction
- `InsnLbu`: LBU instruction
- `InsnLhu`: LHU instruction
## Parameters