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riscv-formal-nmigen
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Add SLLI instruction

This commit is contained in:
Donald Sebastian Leung 2020-08-10 12:29:52 +08:00
parent 94faa3ba68
commit 1fb51e614d
1 changed files with 11 additions and 0 deletions
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insns/InsnSlli.py Normal file
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from InsnRV32IITypeShift import *
class InsnSlli(InsnRV32IITypeShift):
def __init__(self, RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED):
super().__init__(RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED, 0b000000, 0b001)
def elaborate(self, platform):
m = super().elaborate(platform)
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, self.rvfi_rs1_rdata << self.insn_shamt, 0))
return m