88 lines
2.7 KiB
Python
88 lines
2.7 KiB
Python
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import unittest
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from itertools import count
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from ...compat import *
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from ...compat.genlib.fsm import FSM
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from .support import SimCase
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class FSMCase(SimCase, unittest.TestCase):
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class TestBench(Module):
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def __init__(self):
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self.ctrl = Signal()
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self.data = Signal()
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self.status = Signal(8)
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self.submodules.dut = FSM()
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self.dut.act("IDLE",
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If(self.ctrl,
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NextState("START")
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)
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)
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self.dut.act("START",
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If(self.data,
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NextState("SET-STATUS-LOW")
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).Else(
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NextState("SET-STATUS")
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)
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)
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self.dut.act("SET-STATUS",
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NextValue(self.status, 0xaa),
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NextState("IDLE")
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)
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self.dut.act("SET-STATUS-LOW",
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NextValue(self.status[:4], 0xb),
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NextState("IDLE")
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)
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def assertState(self, fsm, state):
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self.assertEqual(fsm.decoding[(yield fsm.state)], state)
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def test_next_state(self):
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def gen():
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yield from self.assertState(self.tb.dut, "IDLE")
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yield
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yield from self.assertState(self.tb.dut, "IDLE")
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yield self.tb.ctrl.eq(1)
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yield
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yield from self.assertState(self.tb.dut, "IDLE")
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yield self.tb.ctrl.eq(0)
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yield
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yield from self.assertState(self.tb.dut, "START")
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yield
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yield from self.assertState(self.tb.dut, "SET-STATUS")
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yield self.tb.ctrl.eq(1)
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yield
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yield from self.assertState(self.tb.dut, "IDLE")
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yield self.tb.ctrl.eq(0)
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yield self.tb.data.eq(1)
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yield
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yield from self.assertState(self.tb.dut, "START")
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yield self.tb.data.eq(0)
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yield
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yield from self.assertState(self.tb.dut, "SET-STATUS-LOW")
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self.run_with(gen())
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def test_next_value(self):
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def gen():
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self.assertEqual((yield self.tb.status), 0x00)
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yield self.tb.ctrl.eq(1)
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yield
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yield self.tb.ctrl.eq(0)
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yield
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yield
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yield from self.assertState(self.tb.dut, "SET-STATUS")
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yield self.tb.ctrl.eq(1)
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yield
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self.assertEqual((yield self.tb.status), 0xaa)
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yield self.tb.ctrl.eq(0)
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yield self.tb.data.eq(1)
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yield
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yield self.tb.data.eq(0)
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yield
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yield from self.assertState(self.tb.dut, "SET-STATUS-LOW")
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yield
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self.assertEqual((yield self.tb.status), 0xab)
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self.run_with(gen())
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