riscv-formal-nmigen/rvfi/insns/insn_srai.py

16 lines
607 B
Python
Raw Normal View History

2020-08-17 11:50:53 +08:00
from .insn_rv32i_i_type_shift import *
2020-08-10 12:56:19 +08:00
"""
SRAI instruction
"""
class InsnSrai(InsnRV32IITypeShift):
def __init__(self, RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA):
super().__init__(RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, 0b010000, 0b101)
2020-08-10 12:56:19 +08:00
def elaborate(self, platform):
m = super().elaborate(platform)
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, (Value.as_signed(self.rvfi_rs1_rdata) >> self.insn_shamt) | (-(Value.as_signed(self.rvfi_rs1_rdata) < 0) << (self.RISCV_FORMAL_XLEN - self.insn_shamt)), 0))
return m