riscv-formal-nmigen/insns/InsnSlli.py

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2020-08-10 12:29:52 +08:00
from InsnRV32IITypeShift import *
class InsnSlli(InsnRV32IITypeShift):
def __init__(self, RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED):
super().__init__(RISCV_FORMAL_ILEN, RISCV_FORMAL_XLEN, RISCV_FORMAL_CSR_MISA, RISCV_FORMAL_COMPRESSED, 0b000000, 0b001)
def elaborate(self, platform):
m = super().elaborate(platform)
m.d.comb += self.spec_rd_wdata.eq(Mux(self.spec_rd_addr, self.rvfi_rs1_rdata << self.insn_shamt, 0))
return m