attenuator: fix return data

.cargo/config

@@ -1,5 +1,5 @@
 [target.thumbv7em-none-eabihf]
-runner = "gdb -q -x gdb_config/fpga_config.gdb"
+runner = "gdb -q -x gdb_config/openocd.gdb"
 rustflags = [
   "-C", "link-arg=-Tlink.x",
 ]

migen/humpback.py

@@ -20,7 +20,7 @@ from migen.build.generic_platform import *
 # Filter out SPI record
 _io = [record for record in _io if record[0] != "spi"]
 
-# Reinsert new SPI record
+# Reinsert new SPI record, without MISO
 _io.append(
 	("spi", 0,
 		Subsignal("cs"	, Pins("B13 B14 B15")),
@@ -31,6 +31,15 @@ _io.append(
 	)
 )
 
+# Insert LVDS input
+_io.append(
+	("eem_in", 2,
+		Subsignal("p", Pins("C1")),
+		Subsignal("n", Pins("C2")),
+		IOStandard("LVDS25"),
+	)
+)
+
 
 # Inherit Platform to gain the programmed clock attribute
 class HumpbackPlatform(Platform):

src/attenuator.rs

@@ -34,16 +34,24 @@ where
 			self.data[i] = self.data[i] << 2;
 		}
 		let mut clone = self.data.clone();
+		// Transmit SPI once to set attenuation
+		if self.spi.transfer(&mut clone).map_err(Error::SPI).is_err() {
+			return Err(Error::AttenuatorError);
+		}
+
+		// Transmit the same data again, to get the return value
+		// Report the data returned by SPI, or an error
+		clone = self.data.clone();
 		match self.spi.transfer(&mut clone).map_err(Error::SPI) {
 			Ok(arr) => {
-				Ok(self.data.clone())
+				Ok([arr[0], arr[1], arr[2], arr[3]])
 			},
 			err => Err(Error::AttenuatorError)
 		}
 	}
 
 	pub fn set_channel_attenuation(&mut self, channel: u8, attenuation: f32) -> Result<u8, Error<E>> {
-		assert!((channel < 4) && (channel >= 0));
+		assert!(channel < 4);
 		let mut arr: [f32; 4] = self.get_attenuation();
 		arr[channel as usize] = attenuation;
 		match self.set_attenuation(arr) {
@@ -53,7 +61,7 @@ where
 	}
 
 	pub fn get_channel_attenuation(&mut self, channel: u8) -> f32 {
-		assert!((channel < 4) && (channel >= 0));
+		assert!(channel < 4);
 		(self.data[channel as usize] as f32)/8.0
 	}
 

src/lib.rs

@@ -60,7 +60,7 @@ where
 {
 	type Error = Error<E>;
 	fn select_chip(&mut self, chip: u8) -> Result<(), Self::Error> {
-		hprintln!("Select chip: {}", chip).unwrap();
+		hprintln!("Selected chip {}.", chip);
 		match chip & (1 << 0) {
 			0 => self.chip_select.0.set_low(),
 			_ => self.chip_select.0.set_high(),

src/main.rs

@@ -49,6 +49,7 @@ fn main() -> ! {
 	let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
 	let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
 	let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
+	let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
 	let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
 
 	// Setup CDONE for checking
@@ -71,8 +72,11 @@ fn main() -> ! {
 	let sclk = gpioa.pa5.into_alternate_af5();
 	let mosi = gpiob.pb5.into_alternate_af5();
 	let miso = gpioa.pa6.into_alternate_af5();
+//	let mut sclk = gpioa.pa5.into_push_pull_output();
+//	let mut mosi = gpiob.pb5.into_push_pull_output();
+//	let mut miso = gpioa.pa6.into_pull_up_input();
 
-	let (cs0, cs1, cs2) = (
+	let (mut cs0, mut cs1, mut cs2) = (
 		gpiob.pb12.into_push_pull_output(),
 		gpioa.pa15.into_push_pull_output(),
 		gpioc.pc7.into_push_pull_output(),
@@ -81,40 +85,45 @@ fn main() -> ! {
 	let mut spi = dp.SPI1.spi(
 		(sclk, miso, mosi),
 		spi::MODE_0,
-		12.mhz(),
+		3.mhz(),
 		ccdr.peripheral.SPI1,
 		&ccdr.clocks,
 	);
 
-	let mut switch = CPLD::new(spi, (cs0, cs1, cs2));
+	// debug led
+	let mut yellow = gpioe.pe1.into_push_pull_output();
+	yellow.set_high().unwrap();
 
+	let mut switch = CPLD::new(spi, (cs0, cs1, cs2));
 	let parts = switch.split();
 
-	let mut attenuator = Attenuator::new(parts.spi2);
-	let mut attenuation :[f32; 4] = [24.0, -5.0, 32.0, 10.2];
-	attenuator.set_attenuation(attenuation);
-	attenuator.set_channel_attenuation(2, 15.3);
-
 	let mut config = ConfigRegister::new(parts.spi1);
-	// Target configuration: 0x000FF1CE
+	let mut att = Attenuator::new(parts.spi2);
-	hprintln!("{:#06X}", config.set_configurations(&mut [
-		(CFGMask::RF_SW,		0xE),
-		(CFGMask::LED,			0xC),
-		(CFGMask::PROFILE,		0x1),
-		(CFGMask::IO_UPDATE,	0x1),
-		(CFGMask::MASK_NU,		0xF),
-		(CFGMask::CLK_SEL0,		0x1),
-		(CFGMask::SYNC_SEL,		0x1),
-		(CFGMask::RST,			0x1),
-		(CFGMask::IO_RST,		0x0),
-		(CFGMask::CLK_SEL1,		0x0),
-		(CFGMask::DIV,			0x0),
-	]).unwrap()).unwrap();
-
-	let mut dds = DDS::new(parts.spi4);
-
 	loop {
-		nop();
+//		let mut counter = config.get_configuration(CFGMask::RF_SW);
+//		hprintln!("{}", counter);
+//		config.set_configurations(&mut [
+//			(CFGMask::RF_SW, ((counter + 1)%16) as u32)
+//		]).unwrap();
+		hprintln!("{:?}", att.set_attenuation([33.0, -1.0, 24.0, 12.0]).unwrap()).unwrap();
+		hprintln!("{:?}", att.set_attenuation([0.0, 0.0, 0.0, 0.0]).unwrap()).unwrap();
 	}
+
+/*
+	cs0.set_low().unwrap();
+	cs1.set_low().unwrap();
+	cs2.set_low().unwrap();
+	
+	let mut arr: [u8; 4] = [0x12, 0x34, 0x56, 0x78];
+	loop {
+		arr[0] = 0x12;
+		arr[1] = 0x34;
+		arr[2] = 0x56;
+		arr[3] = 0x78;
+		cs1.set_high().unwrap();
+		hprintln!("{:?}", spi.transfer(&mut arr).unwrap()).unwrap();
+		cs1.set_low().unwrap();
+	}
+*/
 }