eth ex: support tcp client
This commit is contained in:
parent
05b056d273
commit
b954449ceb
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@ -4,8 +4,8 @@
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// extern crate cortex_m_rt as rt;
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// extern crate cortex_m_rt as rt;
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use core::sync::atomic::{AtomicU32, Ordering};
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use core::sync::atomic::{AtomicU32, Ordering};
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//#[macro_use]
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#[macro_use]
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//extern crate log;
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extern crate log;
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// extern crate cortex_m;
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// extern crate cortex_m;
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use panic_semihosting as _;
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use panic_semihosting as _;
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@ -33,8 +33,6 @@ use stm32h7xx_hal::rcc::CoreClocks;
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use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
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use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
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use Speed::*;
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use Speed::*;
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use libm::round;
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use core::{
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use core::{
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str,
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str,
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fmt::Write
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fmt::Write
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@ -48,6 +46,7 @@ use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder, Routes};
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use smoltcp::socket::SocketSet;
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use smoltcp::socket::SocketSet;
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use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
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use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
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use smoltcp::time::{Duration, Instant};
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use smoltcp::time::{Duration, Instant};
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// use smoltcp::log;
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// Use embedded-nal to access smoltcp
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// Use embedded-nal to access smoltcp
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use embedded_nal::TcpStack;
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use embedded_nal::TcpStack;
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@ -101,6 +100,9 @@ use scpi::{
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scpi_system,
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scpi_system,
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};
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};
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#[path = "util/logger.rs"]
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mod logger;
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/// Configure SYSTICK for 1ms timebase
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/// Configure SYSTICK for 1ms timebase
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fn systick_init(syst: &mut stm32::SYST, clocks: CoreClocks) {
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fn systick_init(syst: &mut stm32::SYST, clocks: CoreClocks) {
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let c_ck_mhz = clocks.c_ck().0 / 1_000_000;
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let c_ck_mhz = clocks.c_ck().0 / 1_000_000;
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@ -138,6 +140,8 @@ const BUFFER_SIZE: usize = 2048;
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#[entry]
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#[entry]
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fn main() -> ! {
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fn main() -> ! {
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logger::semihosting_init();
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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@ -163,8 +167,6 @@ fn main() -> ! {
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// Initialise system...
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// Initialise system...
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cp.SCB.invalidate_icache();
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cp.SCB.invalidate_icache();
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cp.SCB.enable_icache();
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cp.SCB.enable_icache();
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// TODO: ETH DMA coherence issues
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// cp.SCB.enable_dcache(&mut cp.CPUID);
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cp.DWT.enable_cycle_counter();
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cp.DWT.enable_cycle_counter();
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// Initialise IO...
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// Initialise IO...
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@ -175,21 +177,15 @@ fn main() -> ! {
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let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
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let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
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let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
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let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
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let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
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let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
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// let mut link_led = gpiob.pb0.into_push_pull_output(); // LED1, green
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// let mut status_led = gpioe.pe1.into_push_pull_output(); // LD2, yellow
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// let mut listen_led = gpiob.pb14.into_push_pull_output(); // LD3, red
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// link_led.set_low().ok();
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// status_led.set_low().ok();
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// listen_led.set_low().ok();
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// Setup CDONE for checking
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// Setup CDONE for checking
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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match fpga_cdone.is_high() {
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match fpga_cdone.is_high() {
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Ok(true) => hprintln!("FPGA is ready."),
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Ok(true) => debug!("FPGA is ready."),
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Ok(_) => hprintln!("FPGA is in reset state."),
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Ok(_) => debug!("FPGA is in reset state."),
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Err(_) => hprintln!("Error: Cannot read C_DONE"),
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Err(_) => debug!("Error: Cannot read C_DONE"),
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}.unwrap();
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};
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// Setup Urukul
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// Setup Urukul
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/*
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/*
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@ -279,18 +275,11 @@ fn main() -> ! {
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let mut neighbor_storage = [None; 16];
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let mut neighbor_storage = [None; 16];
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let neighbor_cache = NeighborCache::new(&mut neighbor_storage[..]);
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let neighbor_cache = NeighborCache::new(&mut neighbor_storage[..]);
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// Routes
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let default_v4_gw = Ipv4Address::new(192, 168, 1, 1);
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let mut routes_storage = [None; 8];
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let mut routes = Routes::new(&mut routes_storage[..]);
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routes.add_default_ipv4_route(default_v4_gw).unwrap();
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// Device? _eth_dma, as it implements phy::device
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// Device? _eth_dma, as it implements phy::device
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let mut iface = EthernetInterfaceBuilder::new(_eth_dma)
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let mut iface = EthernetInterfaceBuilder::new(_eth_dma)
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.ethernet_addr(mac_addr)
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.ethernet_addr(mac_addr)
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.neighbor_cache(neighbor_cache)
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.neighbor_cache(neighbor_cache)
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.ip_addrs(&mut ip_addrs[..])
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.ip_addrs(&mut ip_addrs[..])
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.routes(routes)
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.finalize();
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.finalize();
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// SCPI configs
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// SCPI configs
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@ -354,9 +343,6 @@ fn main() -> ! {
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let mut eth_up = false;
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let mut eth_up = false;
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// Record activeness of silent socket, init as false
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let mut silent_socket_active = false;
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loop {
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loop {
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let _time = TIME.load(Ordering::Relaxed);
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let _time = TIME.load(Ordering::Relaxed);
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let eth_last = eth_up;
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let eth_last = eth_up;
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@ -388,9 +374,9 @@ fn main() -> ! {
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}
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}
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let result = context.run(data, &mut buf);
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let result = context.run(data, &mut buf);
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if let Err(err) = result {
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if let Err(err) = result {
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writeln!(socket, "{}", str::from_utf8(err.get_message()).unwrap());
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writeln!(socket, "{}", str::from_utf8(err.get_message()).unwrap()).unwrap();
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} else {
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} else {
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write!(socket, "{}", str::from_utf8(buf.as_slice()).unwrap());
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write!(socket, "{}", str::from_utf8(buf.as_slice()).unwrap()).unwrap();
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}
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}
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}
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}
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}
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}
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@ -1,6 +1,9 @@
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#![no_std]
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#![no_std]
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#![no_main]
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#![no_main]
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#[macro_use]
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extern crate log;
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use smoltcp as net;
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use smoltcp as net;
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use stm32h7xx_hal::ethernet;
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use stm32h7xx_hal::ethernet;
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use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
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use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
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@ -18,7 +21,7 @@ use cortex_m_rt::{
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};
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};
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use cortex_m_semihosting::hprintln;
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use cortex_m_semihosting::hprintln;
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use panic_halt as _;
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// use panic_halt as _;
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use rtic::cyccnt::{Instant, U32Ext};
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use rtic::cyccnt::{Instant, U32Ext};
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@ -31,6 +34,9 @@ use firmware::nal_tcp_client::{NetworkStack, NetStorage, NetworkInterface};
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use firmware::{Urukul};
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use firmware::{Urukul};
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use firmware::cpld::{CPLD};
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use firmware::cpld::{CPLD};
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#[path = "util/logger.rs"]
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mod logger;
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static mut NET_STORE: NetStorage = NetStorage {
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static mut NET_STORE: NetStorage = NetStorage {
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// Placeholder for the real IP address, which is initialized at runtime.
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// Placeholder for the real IP address, which is initialized at runtime.
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ip_addrs: [net::wire::IpCidr::Ipv6(
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ip_addrs: [net::wire::IpCidr::Ipv6(
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@ -61,6 +67,8 @@ macro_rules! add_socket {
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#[entry]
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#[entry]
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fn main() -> ! {
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fn main() -> ! {
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// logger::semihosting_init();
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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@ -68,19 +76,24 @@ fn main() -> ! {
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// Enable SRAM3 for the descriptor ring.
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// Enable SRAM3 for the descriptor ring.
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dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
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dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
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// Reset RCC clock
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dp.RCC.rsr.write(|w| w.rmvf().set_bit());
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let rcc = dp.RCC.constrain();
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let pwr = dp.PWR.constrain();
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let pwr = dp.PWR.constrain();
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let vos = pwr.freeze();
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let vos = pwr.freeze();
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let rcc = dp.RCC.constrain();
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let ccdr = rcc
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let ccdr = rcc
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.sysclk(400.mhz())
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.use_hse(16.mhz())
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.hclk(200.mhz())
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.sysclk(400.mhz())
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.per_ck(100.mhz())
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.hclk(200.mhz())
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.pll1_q_ck(48.mhz()) // for SPI
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.per_ck(100.mhz())
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.pll2_p_ck(100.mhz())
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.pll1_q_ck(48.mhz()) // for SPI
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.pll2_q_ck(100.mhz())
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.pll2_p_ck(100.mhz())
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.freeze(vos, &dp.SYSCFG);
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.pll2_q_ck(100.mhz())
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.freeze(vos, &dp.SYSCFG);
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let mut delay = cp.SYST.delay(ccdr.clocks);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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@ -94,6 +107,8 @@ fn main() -> ! {
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yellow_led.set_low().unwrap();
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yellow_led.set_low().unwrap();
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let mut red_led = gpiob.pb14.into_push_pull_output();
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let mut red_led = gpiob.pb14.into_push_pull_output();
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red_led.set_high().unwrap();
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red_led.set_high().unwrap();
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let mut green_led = gpiob.pb0.into_push_pull_output();
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green_led.set_low().unwrap();
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// Configure ethernet IO
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// Configure ethernet IO
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{
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{
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@ -177,6 +192,9 @@ fn main() -> ! {
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cp.SCB.invalidate_icache();
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cp.SCB.invalidate_icache();
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cp.SCB.enable_icache();
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cp.SCB.enable_icache();
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// cp.SCB.clean_dcache(&mut cp.CPUID);
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// cp.SCB.disable_dcache(&mut cp.CPUID);
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// cp.SCB.enable_dcache(&mut cp.CPUID);
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let mut time: u32 = 0;
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let mut time: u32 = 0;
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let mut next_ms = Instant::now();
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let mut next_ms = Instant::now();
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@ -195,7 +213,27 @@ fn main() -> ! {
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)
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)
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.unwrap();
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.unwrap();
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delay.delay_ms(1000_u16);
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client.network_stack.update(time);
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green_led.set_high().unwrap();
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loop {
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loop {
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let tick = Instant::now() > next_ms;
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if tick {
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next_ms += 400_000.cycles();
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time += 1;
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}
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client.network_stack.update(time);
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client
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.poll(|_client, topic, message, _properties| match topic {
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_ => info!("On '{:?}', received: {:?}", topic, message),
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})
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.unwrap();
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match client.is_connected() {
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match client.is_connected() {
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true => {
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true => {
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yellow_led.set_high().unwrap();
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yellow_led.set_high().unwrap();
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@ -207,19 +245,6 @@ fn main() -> ! {
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},
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},
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};
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};
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client
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.poll(|_client, topic, message, _properties| match topic {
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_ => hprintln!("On '{:?}', received: {:?}", topic, message).unwrap(),
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})
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.unwrap();
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let tick = Instant::now() > next_ms;
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if tick {
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next_ms += 400_000.cycles();
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time += 1;
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}
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if tick && (time % 1000) == 0 {
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if tick && (time % 1000) == 0 {
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client
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client
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.publish("nucleo", "Hello, World!".as_bytes(), QoS::AtMostOnce, &[])
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.publish("nucleo", "Hello, World!".as_bytes(), QoS::AtMostOnce, &[])
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@ -227,10 +252,10 @@ fn main() -> ! {
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}
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}
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// Update the TCP stack.
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// Update the TCP stack.
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let sleep = client.network_stack.update(time);
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// let sleep = client.network_stack.update(time);
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if sleep {
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// if sleep {
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//cortex_m::asm::wfi();
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// //cortex_m::asm::wfi();
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cortex_m::asm::nop();
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// cortex_m::asm::nop();
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}
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// }
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}
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}
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}
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}
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@ -1,179 +1,174 @@
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#![no_main]
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#![no_std]
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#![no_std]
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#![no_main]
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#[macro_use]
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extern crate log;
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#[macro_use]
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extern crate lazy_static;
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use smoltcp as net;
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use stm32h7xx_hal::ethernet;
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use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
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use embedded_hal::{
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blocking::spi::Transfer,
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digital::v2::OutputPin,
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};
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use core::sync::atomic::{AtomicU32, Ordering};
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use core::sync::atomic::{AtomicU32, Ordering};
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use core::fmt::Write;
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use core::str;
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// extern crate cortex_m;
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// use heapless::{consts, String};
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use panic_semihosting as _;
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use cortex_m;
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use cortex_m;
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use cortex_m::asm::nop;
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use cortex_m::iprintln;
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use cortex_m_rt::{
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use cortex_m_rt::{
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entry,
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entry,
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exception,
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exception,
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};
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};
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use cortex_m_semihosting::hprintln;
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// use cortex_m_semihosting::hprintln;
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extern crate smoltcp;
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// use panic_halt as _;
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use stm32h7xx_hal::ethernet;
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use rtic::cyccnt::{Instant, U32Ext};
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use stm32h7xx_hal::gpio::Speed;
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use stm32h7xx_hal::hal::digital::v2::{
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use log::info;
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OutputPin,
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use log::debug;
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InputPin,
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use log::trace;
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use nb::block;
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use minimq::{
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embedded_nal::{IpAddr, Ipv4Addr, TcpStack, SocketAddr, Mode},
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MqttClient, QoS,
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};
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};
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use stm32h7xx_hal::rcc::CoreClocks;
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|
||||||
use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
|
|
||||||
use Speed::*;
|
|
||||||
|
|
||||||
use libm::round;
|
use firmware::nal_tcp_client::{NetworkStack, NetStorage, NetworkInterface};
|
||||||
|
use firmware::{Urukul};
|
||||||
|
use firmware::cpld::{CPLD};
|
||||||
|
|
||||||
use core::{
|
|
||||||
str,
|
|
||||||
fmt::Write
|
|
||||||
};
|
|
||||||
use core::mem::uninitialized;
|
|
||||||
|
|
||||||
use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr, Ipv4Address};
|
|
||||||
use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder, Routes};
|
|
||||||
use smoltcp::socket::SocketSet;
|
|
||||||
use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
|
|
||||||
use smoltcp::time::{Duration, Instant};
|
|
||||||
|
|
||||||
use embedded_nal::TcpStack;
|
|
||||||
|
|
||||||
use firmware;
|
|
||||||
use firmware::{
|
|
||||||
attenuator::Attenuator,
|
|
||||||
config_register::{
|
|
||||||
ConfigRegister,
|
|
||||||
CFGMask,
|
|
||||||
StatusMask,
|
|
||||||
},
|
|
||||||
dds::{
|
|
||||||
DDS,
|
|
||||||
DDSCFRMask,
|
|
||||||
},
|
|
||||||
cpld::{
|
|
||||||
CPLD,
|
|
||||||
},
|
|
||||||
Urukul,
|
|
||||||
};
|
|
||||||
use scpi::prelude::*;
|
|
||||||
|
|
||||||
/// Configure SYSTICK for 1ms timebase
|
|
||||||
fn systick_init(syst: &mut stm32::SYST, clocks: CoreClocks) {
|
|
||||||
let c_ck_mhz = clocks.c_ck().0 / 1_000_000;
|
|
||||||
|
|
||||||
let syst_calib = 0x3E8;
|
|
||||||
|
|
||||||
syst.set_clock_source(cortex_m::peripheral::syst::SystClkSource::Core);
|
|
||||||
syst.set_reload((syst_calib * c_ck_mhz) - 1);
|
|
||||||
syst.enable_interrupt();
|
|
||||||
syst.enable_counter();
|
|
||||||
}
|
|
||||||
|
|
||||||
/// ======================================================================
|
|
||||||
/// Entry point
|
|
||||||
/// ======================================================================
|
|
||||||
|
|
||||||
/// TIME is an atomic u32 that counts milliseconds. Although not used
|
|
||||||
/// here, it is very useful to have for network protocols
|
|
||||||
static TIME: AtomicU32 = AtomicU32::new(0);
|
|
||||||
|
|
||||||
/// Locally administered MAC address
|
|
||||||
const MAC_ADDRESS: [u8; 6] = [0x02, 0x00, 0x11, 0x22, 0x33, 0x44];
|
|
||||||
|
|
||||||
/// Ethernet descriptor rings are a global singleton
|
|
||||||
#[link_section = ".sram3.eth"]
|
#[link_section = ".sram3.eth"]
|
||||||
static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
|
static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
|
||||||
|
|
||||||
// Theoratical maximum number of socket that can be handled
|
// Logging setup
|
||||||
const SOCKET_COUNT: usize = 2;
|
#[path = "util/logger.rs"]
|
||||||
|
mod logger;
|
||||||
|
#[path = "util/clock.rs"]
|
||||||
|
mod clock;
|
||||||
|
// End of logging setup
|
||||||
|
|
||||||
// Give buffer sizes of transmitting and receiving TCP packets
|
// static TIME: AtomicU32 = AtomicU32::new(0);
|
||||||
const BUFFER_SIZE: usize = 2048;
|
|
||||||
|
|
||||||
// the program entry point
|
|
||||||
#[entry]
|
#[entry]
|
||||||
fn main() -> ! {
|
fn main() -> ! {
|
||||||
|
|
||||||
|
// logger::semihosting_init();
|
||||||
|
let clock = clock::Clock::new();
|
||||||
|
|
||||||
let mut cp = cortex_m::Peripherals::take().unwrap();
|
let mut cp = cortex_m::Peripherals::take().unwrap();
|
||||||
let dp = pac::Peripherals::take().unwrap();
|
let dp = pac::Peripherals::take().unwrap();
|
||||||
|
|
||||||
// Initialise power...
|
cp.DWT.enable_cycle_counter();
|
||||||
|
|
||||||
|
// Enable SRAM3 for the descriptor ring.
|
||||||
|
dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
|
||||||
|
// Reset RCC clock
|
||||||
|
dp.RCC.rsr.write(|w| w.rmvf().set_bit());
|
||||||
|
|
||||||
let pwr = dp.PWR.constrain();
|
let pwr = dp.PWR.constrain();
|
||||||
let vos = pwr.freeze();
|
let vos = pwr.freeze();
|
||||||
|
|
||||||
// Initialise SRAM3
|
|
||||||
dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
|
|
||||||
|
|
||||||
// Initialise clocks...
|
|
||||||
let rcc = dp.RCC.constrain();
|
let rcc = dp.RCC.constrain();
|
||||||
let ccdr = rcc
|
let ccdr = rcc
|
||||||
.sys_ck(200.mhz())
|
.use_hse(8.mhz())
|
||||||
.hclk(200.mhz())
|
.sysclk(400.mhz())
|
||||||
.pll1_r_ck(100.mhz()) // for TRACECK
|
// .hclk(200.mhz())
|
||||||
.pll1_q_ck(48.mhz()) // for SPI
|
// .per_ck(100.mhz())
|
||||||
.freeze(vos, &dp.SYSCFG);
|
.pll1_q_ck(48.mhz()) // for SPI
|
||||||
|
// .pll1_r_ck(400.mhz()) // for TRACECK
|
||||||
|
// .pll2_p_ck(100.mhz())
|
||||||
|
// .pll2_q_ck(100.mhz())
|
||||||
|
.freeze(vos, &dp.SYSCFG);
|
||||||
|
|
||||||
// Get the delay provider.
|
let mut delay = cp.SYST.delay(ccdr.clocks);
|
||||||
let delay = cp.SYST.delay(ccdr.clocks);
|
|
||||||
|
|
||||||
// Initialise system...
|
|
||||||
cp.SCB.invalidate_icache();
|
|
||||||
cp.SCB.enable_icache();
|
|
||||||
// TODO: ETH DMA coherence issues
|
|
||||||
// cp.SCB.enable_dcache(&mut cp.CPUID);
|
|
||||||
cp.DWT.enable_cycle_counter();
|
|
||||||
|
|
||||||
// Initialise IO...
|
|
||||||
let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
|
let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
|
||||||
let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
|
let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
|
||||||
let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
|
let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
|
||||||
let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
|
let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
|
||||||
let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
|
let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
|
||||||
let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
|
let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
|
||||||
let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
|
let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
|
||||||
// let mut link_led = gpiob.pb0.into_push_pull_output(); // LED1, green
|
|
||||||
// let mut status_led = gpioe.pe1.into_push_pull_output(); // LD2, yellow
|
|
||||||
// let mut listen_led = gpiob.pb14.into_push_pull_output(); // LD3, red
|
|
||||||
// link_led.set_low().ok();
|
|
||||||
// status_led.set_low().ok();
|
|
||||||
// listen_led.set_low().ok();
|
|
||||||
|
|
||||||
// Setup CDONE for checking
|
let mut yellow_led = gpioe.pe1.into_push_pull_output();
|
||||||
let fpga_cdone = gpiod.pd15.into_pull_up_input();
|
yellow_led.set_low().unwrap();
|
||||||
|
let mut red_led = gpiob.pb14.into_push_pull_output();
|
||||||
|
red_led.set_high().unwrap();
|
||||||
|
let mut green_led = gpiob.pb0.into_push_pull_output();
|
||||||
|
green_led.set_low().unwrap();
|
||||||
|
|
||||||
match fpga_cdone.is_high() {
|
// Configure ethernet IO
|
||||||
Ok(true) => hprintln!("FPGA is ready."),
|
{
|
||||||
Ok(_) => hprintln!("FPGA is in reset state."),
|
let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
Err(_) => hprintln!("Error: Cannot read C_DONE"),
|
let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
}.unwrap();
|
let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
|
let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
|
let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
|
let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
|
let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
|
let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
|
let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||||
|
}
|
||||||
|
|
||||||
// Setup Urukul
|
// Configure ethernet
|
||||||
/*
|
let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
|
||||||
* Using SPI1, AF5
|
let (eth_dma, _eth_mac) = unsafe {
|
||||||
* SCLK -> PA5
|
ethernet::new_unchecked(
|
||||||
* MOSI -> PB5
|
dp.ETHERNET_MAC,
|
||||||
* MISO -> PA6
|
dp.ETHERNET_MTL,
|
||||||
* CS -> 0: PB12, 1: PA15, 2: PC7
|
dp.ETHERNET_DMA,
|
||||||
*/
|
&mut DES_RING,
|
||||||
|
mac_addr.clone(),
|
||||||
|
)
|
||||||
|
};
|
||||||
|
|
||||||
|
unsafe { ethernet::enable_interrupt() }
|
||||||
|
|
||||||
|
let mut ip_addrs = [net::wire::IpCidr::new(net::wire::IpAddress::v4(192, 168, 1, 200), 24)];
|
||||||
|
|
||||||
|
let mut neighbor_cache_entries = [None; 8];
|
||||||
|
let mut neighbor_cache = net::iface::NeighborCache::new(&mut neighbor_cache_entries[..]);
|
||||||
|
// neighbor_cache.fill(
|
||||||
|
// net::wire::IpAddress::v4(192, 168, 1, 125),
|
||||||
|
// net::wire::EthernetAddress([0x2C, 0xF0, 0x5D, 0x26, 0xB8, 0x2F]),
|
||||||
|
// clock.elapsed(),
|
||||||
|
// );
|
||||||
|
|
||||||
|
let mut net_interface = net::iface::EthernetInterfaceBuilder::new(eth_dma)
|
||||||
|
.ethernet_addr(mac_addr)
|
||||||
|
.neighbor_cache(neighbor_cache)
|
||||||
|
.ip_addrs(&mut ip_addrs[..])
|
||||||
|
.finalize();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Using SPI1, AF5
|
||||||
|
* SCLK -> PA5
|
||||||
|
* MOSI -> PB5
|
||||||
|
* MISO -> PA6
|
||||||
|
* CS -> 0: PB12, 1: PA15, 2: PC7
|
||||||
|
* I/O_Update -> PB15
|
||||||
|
*/
|
||||||
let sclk = gpioa.pa5.into_alternate_af5();
|
let sclk = gpioa.pa5.into_alternate_af5();
|
||||||
let mosi = gpiob.pb5.into_alternate_af5();
|
let mosi = gpiob.pb5.into_alternate_af5();
|
||||||
let miso = gpioa.pa6.into_alternate_af5();
|
let miso = gpioa.pa6.into_alternate_af5();
|
||||||
|
|
||||||
|
|
||||||
let (cs0, cs1, cs2) = (
|
let (cs0, cs1, cs2) = (
|
||||||
gpiob.pb12.into_push_pull_output(),
|
gpiob.pb12.into_push_pull_output(),
|
||||||
gpioa.pa15.into_push_pull_output(),
|
gpioa.pa15.into_push_pull_output(),
|
||||||
gpioc.pc7.into_push_pull_output(),
|
gpioc.pc7.into_push_pull_output(),
|
||||||
);
|
);
|
||||||
|
|
||||||
/*
|
|
||||||
* I/O_Update -> PB15
|
|
||||||
*/
|
|
||||||
let io_update = gpiob.pb15.into_push_pull_output();
|
let io_update = gpiob.pb15.into_push_pull_output();
|
||||||
|
|
||||||
let spi = dp.SPI1.spi(
|
let spi = dp.SPI1.spi(
|
||||||
|
@ -184,201 +179,93 @@ fn main() -> ! {
|
||||||
&ccdr.clocks,
|
&ccdr.clocks,
|
||||||
);
|
);
|
||||||
|
|
||||||
let switch = CPLD::new(spi, (cs0, cs1, cs2), io_update);
|
let cpld = CPLD::new(spi, (cs0, cs1, cs2), io_update);
|
||||||
let parts = switch.split();
|
let parts = cpld.split();
|
||||||
let mut urukul = Urukul::new(
|
|
||||||
|
let urukul = Urukul::new(
|
||||||
parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7,
|
parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7,
|
||||||
[25_000_000, 25_000_000, 25_000_000, 25_000_000]
|
[25_000_000, 25_000_000, 25_000_000, 25_000_000]
|
||||||
);
|
);
|
||||||
|
|
||||||
// Setup ethernet pins
|
cp.SCB.invalidate_icache();
|
||||||
setup_ethernet_pins(
|
cp.SCB.enable_icache();
|
||||||
gpioa.pa1, gpioa.pa2, gpioc.pc1, gpioa.pa7, gpioc.pc4,
|
|
||||||
gpioc.pc5, gpiog.pg11, gpiog.pg13, gpiob.pb13
|
|
||||||
);
|
|
||||||
|
|
||||||
// Initialise ethernet...
|
// let mut time: u32 = 0;
|
||||||
assert_eq!(ccdr.clocks.hclk().0, 200_000_000); // HCLK 200MHz
|
// let mut next_ms = Instant::now();
|
||||||
assert_eq!(ccdr.clocks.pclk1().0, 100_000_000); // PCLK 100MHz
|
|
||||||
assert_eq!(ccdr.clocks.pclk2().0, 100_000_000); // PCLK 100MHz
|
|
||||||
assert_eq!(ccdr.clocks.pclk4().0, 100_000_000); // PCLK 100MHz
|
|
||||||
|
|
||||||
let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
|
// next_ms += 400_000.cycles();
|
||||||
let (_eth_dma, mut eth_mac) = unsafe {
|
|
||||||
ethernet::new_unchecked(
|
let mut socket_set_entries: [_; 8] = Default::default();
|
||||||
dp.ETHERNET_MAC,
|
let mut sockets = net::socket::SocketSet::new(&mut socket_set_entries[..]);
|
||||||
dp.ETHERNET_MTL,
|
|
||||||
dp.ETHERNET_DMA,
|
let mut rx_storage = [0; 4096];
|
||||||
&mut DES_RING,
|
let mut tx_storage = [0; 4096];
|
||||||
mac_addr.clone(),
|
|
||||||
)
|
let tcp_socket = {
|
||||||
|
let tx_buffer = net::socket::TcpSocketBuffer::new(&mut tx_storage[..]);
|
||||||
|
let rx_buffer = net::socket::TcpSocketBuffer::new(&mut rx_storage[..]);
|
||||||
|
|
||||||
|
net::socket::TcpSocket::new(tx_buffer, rx_buffer)
|
||||||
};
|
};
|
||||||
unsafe {
|
let handle = sockets.add(tcp_socket);
|
||||||
ethernet::enable_interrupt();
|
|
||||||
cp.NVIC.set_priority(stm32::Interrupt::ETH, 196); // Mid prio
|
delay.delay_ms(2000_u16);
|
||||||
cortex_m::peripheral::NVIC::unmask(stm32::Interrupt::ETH);
|
green_led.set_high().unwrap();
|
||||||
|
|
||||||
|
{
|
||||||
|
let mut socket = sockets.get::<net::socket::TcpSocket>(handle);
|
||||||
|
socket.connect((net::wire::IpAddress::v4(192, 168, 1, 125), 1883), 49500).unwrap();
|
||||||
|
debug!("connect!");
|
||||||
}
|
}
|
||||||
|
|
||||||
// ----------------------------------------------------------
|
yellow_led.set_low().unwrap();
|
||||||
// Begin periodic tasks
|
red_led.set_high().unwrap();
|
||||||
|
|
||||||
systick_init(&mut delay.free(), ccdr.clocks);
|
let mut green = true;
|
||||||
unsafe {
|
|
||||||
cp.SCB.shpr[15 - 4].write(128);
|
|
||||||
} // systick exception priority
|
|
||||||
|
|
||||||
// ----------------------------------------------------------
|
|
||||||
// Main application loop
|
|
||||||
|
|
||||||
// Setup addresses, maybe not MAC?
|
|
||||||
// MAC is set up in prior
|
|
||||||
let local_addr = IpAddress::v4(192, 168, 1, 200);
|
|
||||||
let mut ip_addrs = [IpCidr::new(local_addr, 24)];
|
|
||||||
|
|
||||||
// let neighbor_cache = NeighborCache::new(BTreeMap::new());
|
|
||||||
let mut neighbor_storage = [None; 16];
|
|
||||||
let neighbor_cache = NeighborCache::new(&mut neighbor_storage[..]);
|
|
||||||
|
|
||||||
// Routes
|
|
||||||
let default_v4_gw = Ipv4Address::new(192, 168, 1, 1);
|
|
||||||
let mut routes_storage = [None; 8];
|
|
||||||
let mut routes = Routes::new(&mut routes_storage[..]);
|
|
||||||
routes.add_default_ipv4_route(default_v4_gw).unwrap();
|
|
||||||
|
|
||||||
// Device? _eth_dma, as it implements phy::device
|
|
||||||
let mut iface = EthernetInterfaceBuilder::new(_eth_dma)
|
|
||||||
.ethernet_addr(mac_addr)
|
|
||||||
.neighbor_cache(neighbor_cache)
|
|
||||||
.ip_addrs(&mut ip_addrs[..])
|
|
||||||
.routes(routes)
|
|
||||||
.finalize();
|
|
||||||
|
|
||||||
// SCPI configs
|
|
||||||
// Device was declared in prior
|
|
||||||
|
|
||||||
// let mut errors = ArrayErrorQueue::<[Error; 10]>::new();
|
|
||||||
// let mut context = Context::new(&mut urukul, &mut errors, TREE);
|
|
||||||
|
|
||||||
// //Response bytebuffer
|
|
||||||
// let mut buf = ArrayVecFormatter::<[u8; 256]>::new();
|
|
||||||
|
|
||||||
// SCPI configs END
|
|
||||||
|
|
||||||
// TCP socket
|
|
||||||
let server_socket = {
|
|
||||||
static mut server_rx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
|
||||||
static mut server_tx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
|
||||||
let server_rx_buffer = TcpSocketBuffer::new( unsafe { &mut server_rx_storage[..] } );
|
|
||||||
let server_tx_buffer = TcpSocketBuffer::new( unsafe { &mut server_tx_storage[..] } );
|
|
||||||
TcpSocket::new(server_rx_buffer, server_tx_buffer)
|
|
||||||
};
|
|
||||||
|
|
||||||
// Setup a silent socket
|
|
||||||
let client_socket = {
|
|
||||||
static mut client_rx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
|
||||||
static mut client_tx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
|
||||||
let client_rx_buffer = TcpSocketBuffer::new( unsafe { &mut client_rx_storage[..] } );
|
|
||||||
let client_tx_buffer = TcpSocketBuffer::new( unsafe { &mut client_tx_storage[..] } );
|
|
||||||
TcpSocket::new(client_rx_buffer, client_tx_buffer)
|
|
||||||
};
|
|
||||||
|
|
||||||
// Socket storage
|
|
||||||
let mut sockets_storage: [_; 2] = Default::default();
|
|
||||||
|
|
||||||
let mut socket_set = SocketSet::new(&mut sockets_storage[..]);
|
|
||||||
let server_handle = socket_set.add(server_socket);
|
|
||||||
let client_handle = socket_set.add(client_socket);
|
|
||||||
|
|
||||||
loop {
|
loop {
|
||||||
let _time = TIME.load(Ordering::Relaxed);
|
// let timestamp = net::time::Instant::from_millis(TIME.load(Ordering::Relaxed) as i64);
|
||||||
match iface.poll(&mut socket_set, Instant::from_millis(_time as i64)) {
|
match net_interface.poll(&mut sockets, clock.elapsed()) {
|
||||||
Ok(_) => {
|
Ok(_) => {},
|
||||||
// hprintln!("Ethernet up").unwrap();
|
|
||||||
},
|
|
||||||
Err(e) => {
|
Err(e) => {
|
||||||
hprintln!("Ethernet down!").unwrap();
|
debug!("poll error: {}", e);
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
// Conenct to TCP server through port 49500
|
|
||||||
{
|
|
||||||
let mut socket = socket_set.get::<TcpSocket>(server_handle);
|
|
||||||
if !socket.is_active() && !socket.is_listening(){
|
|
||||||
socket.listen(7777).unwrap();
|
|
||||||
hprintln!("Server listening").unwrap();
|
|
||||||
}
|
|
||||||
|
|
||||||
// hprintln!("listener state :{}", socket.state()).unwrap();
|
|
||||||
|
|
||||||
if socket.can_recv() {
|
|
||||||
hprintln!("{:?}", str::from_utf8(socket.recv(|data| {
|
|
||||||
(data.len(), data)
|
|
||||||
}).unwrap()).unwrap()).unwrap();
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
{
|
{
|
||||||
let mut socket = socket_set.get::<TcpSocket>(client_handle);
|
let mut socket = sockets.get::<net::socket::TcpSocket>(handle);
|
||||||
if !socket.is_open() {
|
|
||||||
socket.abort();
|
if socket.may_recv() {
|
||||||
|
yellow_led.set_high().unwrap();
|
||||||
|
red_led.set_low().unwrap();
|
||||||
|
let data = socket.recv(|data| {
|
||||||
|
(data.len(), data)
|
||||||
|
}).unwrap();
|
||||||
|
if socket.can_send() {
|
||||||
|
socket.send_slice("response".as_bytes()).unwrap();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if socket.may_send() {
|
||||||
|
yellow_led.set_high().unwrap();
|
||||||
|
red_led.set_low().unwrap();
|
||||||
|
debug!("close");
|
||||||
socket.close();
|
socket.close();
|
||||||
hprintln!("reset state: {}", socket.state()).unwrap();
|
|
||||||
socket.connect((IpAddress::v4(192, 168, 1, 200), 1883),
|
|
||||||
(IpAddress::Unspecified, 45000)).unwrap();
|
|
||||||
hprintln!("post connect state: {}", socket.state()).unwrap();
|
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
// hprintln!("client state: {}", socket.state()).unwrap();
|
match net_interface.poll_delay(&sockets, clock.elapsed()) {
|
||||||
|
Some(net::time::Duration {millis :0}) => debug!("resuming"),
|
||||||
if socket.can_send() {
|
Some(time_delay) => {
|
||||||
socket.send_slice(b"regards from socket").unwrap();
|
info!("sleeping for {} ms", time_delay);
|
||||||
}
|
// green_led.set_low().unwrap();
|
||||||
|
// delay.delay_ms(time_delay.total_millis() as u32);
|
||||||
|
// green_led.set_high().unwrap();
|
||||||
|
clock.advance(time_delay)
|
||||||
|
},
|
||||||
|
None => {
|
||||||
|
// delay.delay_ms(1_u32);
|
||||||
|
clock.advance(net::time::Duration::from_millis(1))
|
||||||
|
},
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
use stm32h7xx_hal::gpio::{
|
|
||||||
gpioa::{PA1, PA2, PA7},
|
|
||||||
gpiob::{PB13},
|
|
||||||
gpioc::{PC1, PC4, PC5},
|
|
||||||
gpiog::{PG11, PG13},
|
|
||||||
Speed::VeryHigh,
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Migrated ethernet setup pins
|
|
||||||
*/
|
|
||||||
pub fn setup_ethernet_pins<REF_CLK, MDIO, MDC, CRS_DV, RXD0, RXD1, TX_EN, TXD0, TXD1>(
|
|
||||||
pa1: PA1<REF_CLK>, pa2: PA2<MDIO>, pc1: PC1<MDC>, pa7: PA7<CRS_DV>, pc4: PC4<RXD0>,
|
|
||||||
pc5: PC5<RXD1>, pg11: PG11<TX_EN>, pg13: PG13<TXD0>, pb13: PB13<TXD1>
|
|
||||||
) {
|
|
||||||
pa1.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
pa2.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
pc1.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
pa7.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
pc4.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
pc5.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
pg11.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
pg13.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
pb13.into_alternate_af11().set_speed(VeryHigh);
|
|
||||||
}
|
|
||||||
|
|
||||||
#[interrupt]
|
|
||||||
fn ETH() {
|
|
||||||
unsafe { ethernet::interrupt_handler() }
|
|
||||||
}
|
|
||||||
|
|
||||||
#[exception]
|
|
||||||
fn SysTick() {
|
|
||||||
TIME.fetch_add(1, Ordering::Relaxed);
|
|
||||||
}
|
|
||||||
|
|
||||||
#[exception]
|
|
||||||
fn HardFault(ef: &cortex_m_rt::ExceptionFrame) -> ! {
|
|
||||||
panic!("HardFault at {:#?}", ef);
|
|
||||||
}
|
|
||||||
|
|
||||||
#[exception]
|
|
||||||
fn DefaultHandler(irqn: i16) {
|
|
||||||
panic!("Unhandled exception (IRQn = {})", irqn);
|
|
||||||
}
|
|
||||||
|
|
|
@ -86,7 +86,7 @@ use cortex_m_semihosting::hio::HStdout;
|
||||||
|
|
||||||
lazy_static! {
|
lazy_static! {
|
||||||
static ref HLOGGER: Logger<Semihosting<InterruptOk, HStdout>> = Logger {
|
static ref HLOGGER: Logger<Semihosting<InterruptOk, HStdout>> = Logger {
|
||||||
level: LevelFilter::Debug,
|
level: LevelFilter::Trace,
|
||||||
inner: semihosting::InterruptOk::<_>::stdout().expect("Get Semihosting stdout"),
|
inner: semihosting::InterruptOk::<_>::stdout().expect("Get Semihosting stdout"),
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue