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migen: add io_update

This commit is contained in:
occheung 2020-08-23 22:28:32 +08:00
parent 6ef122c9a1
commit a62c204b78
2 changed files with 11 additions and 8 deletions
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7
migen/fpga_config.py
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@ -16,10 +16,12 @@ class UrukulConnector(Module):
platform.request("eem0_n", 2), platform.request("eem0_n", 2),
platform.request("eem0", 3), platform.request("eem0", 3),
platform.request("eem0", 4), platform.request("eem0", 4),
platform.request("eem0", 5) platform.request("eem0", 5),
platform.request("eem0", 6)
] ]
spi = platform.request("spi") spi = platform.request("spi")
led = platform.request("user_led") led = platform.request("user_led")
io_update = platform.request("io_update")
# Assert SPI resource length # Assert SPI resource length
assert len(spi.sclk) == 1 assert len(spi.sclk) == 1
@ -61,6 +63,9 @@ class UrukulConnector(Module):
eem0[5].p.eq(spi.cs[2]), eem0[5].p.eq(spi.cs[2]),
eem0[5].n.eq(~spi.cs[2]), eem0[5].n.eq(~spi.cs[2]),
eem0[6].p.eq(io_update),
eem0[6].n.eq(~io_update),
led.eq(1) led.eq(1)
] ]

12
migen/humpback.py
View File

@ -31,16 +31,14 @@ _io.append(
) )
) )
# Insert LVDS input # Resource: DDS I/O_Update
'''
io_update -> PB13 : B12
'''
_io.append( _io.append(
("eem_in", 2, ("io_update", 0, Pins("B12"), IOStandard("LVCMOS33"))
Subsignal("p", Pins("C1")),
Subsignal("n", Pins("C2")),
IOStandard("LVDS25"),
)
) )
# Inherit Platform to gain the programmed clock attribute # Inherit Platform to gain the programmed clock attribute
class HumpbackPlatform(Platform): class HumpbackPlatform(Platform):
def __init__(self): def __init__(self):