rm examples
parent
09686e6940
commit
5a2770b825
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@ -1,398 +0,0 @@
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#![no_main]
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#![no_std]
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use core::sync::atomic::{AtomicU32, Ordering};
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#[macro_use]
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extern crate log;
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use cortex_m;
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use cortex_m_rt::{
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entry,
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exception,
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};
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extern crate smoltcp;
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use stm32h7xx_hal::ethernet;
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use stm32h7xx_hal::hal::digital::v2::InputPin;
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use stm32h7xx_hal::rcc::CoreClocks;
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use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
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use core::{
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str,
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fmt::Write
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};
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use core::mem::uninitialized;
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// Exception: no phy::wait
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//use smoltcp::phy::wait as phy_wait;
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use smoltcp::wire::{IpAddress, IpCidr};
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use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder};
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use smoltcp::socket::SocketSet;
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use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
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use smoltcp::time::{Duration, Instant};
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// use smoltcp::log;
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// Use embedded-nal to access smoltcp
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use embedded_nal::TcpStack;
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use firmware;
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use firmware::{
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cpld::{
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CPLD,
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},
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scpi::{
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HelloWorldCommand,
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Channel0SwitchCommand,
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Channel1SwitchCommand,
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Channel2SwitchCommand,
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Channel3SwitchCommand,
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Channel0SystemClockCommand,
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Channel0AttenuationCommand,
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Channel1AttenuationCommand,
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Channel2AttenuationCommand,
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Channel3AttenuationCommand,
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ClockSourceCommand,
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ClockDivisionCommand,
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ProfileCommand,
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Channel0Profile0SingletoneCommand,
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Channel0Profile0SingletoneFrequencyCommand,
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Channel0Profile0SingletonePhaseCommand,
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Channel0Profile0SingletoneAmplitudeCommand
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},
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Urukul, scpi_root, recursive_scpi_tree, scpi_tree
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};
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use scpi::prelude::*;
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use scpi::ieee488::commands::*;
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use scpi::scpi::commands::*;
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use scpi::{
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ieee488_cls,
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ieee488_ese,
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ieee488_esr,
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ieee488_idn,
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ieee488_opc,
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ieee488_rst,
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ieee488_sre,
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ieee488_stb,
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ieee488_tst,
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ieee488_wai,
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scpi_crate_version,
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scpi_status,
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scpi_system,
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};
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#[path = "util/logger.rs"]
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mod logger;
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/// Configure SYSTICK for 1ms timebase
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fn systick_init(syst: &mut stm32::SYST, clocks: CoreClocks) {
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let c_ck_mhz = clocks.c_ck().0 / 1_000_000;
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let syst_calib = 0x3E8;
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syst.set_clock_source(cortex_m::peripheral::syst::SystClkSource::Core);
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syst.set_reload((syst_calib * c_ck_mhz) - 1);
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syst.enable_interrupt();
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syst.enable_counter();
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}
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/// ======================================================================
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/// Entry point
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/// ======================================================================
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/// TIME is an atomic u32 that counts milliseconds. Although not used
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/// here, it is very useful to have for network protocols
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static TIME: AtomicU32 = AtomicU32::new(0);
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/// Locally administered MAC address
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const MAC_ADDRESS: [u8; 6] = [0x02, 0x00, 0x11, 0x22, 0x33, 0x44];
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/// Ethernet descriptor rings are a global singleton
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#[link_section = ".sram3.eth"]
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static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
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// Theoratical maximum number of socket that can be handled
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const SOCKET_COUNT: usize = 2;
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// Give buffer sizes of transmitting and receiving TCP packets
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const BUFFER_SIZE: usize = 2048;
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// the program entry point
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#[entry]
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fn main() -> ! {
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// logger::semihosting_init();
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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// Initialise power...
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let pwr = dp.PWR.constrain();
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let vos = pwr.freeze();
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// Initialise SRAM3
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dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
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// Initialise clocks...
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let rcc = dp.RCC.constrain();
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let ccdr = rcc
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.use_hse(8.mhz())
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.sys_ck(200.mhz())
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.hclk(200.mhz())
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.pll1_r_ck(400.mhz()) // for TRACECK
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.pll1_q_ck(48.mhz()) // for SPI
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.freeze(vos, &dp.SYSCFG);
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unsafe {
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logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
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}
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// Get the delay provider.
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let delay = cp.SYST.delay(ccdr.clocks);
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// Initialise system...
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cp.SCB.invalidate_icache();
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cp.SCB.enable_icache();
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cp.DWT.enable_cycle_counter();
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// Initialise IO...
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
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let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
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let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
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let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
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let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
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// gpiob.pb3.into_alternate_af0().set_speed(Speed::VeryHigh);
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logger::init();
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// Setup CDONE for checking
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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match fpga_cdone.is_high() {
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Ok(true) => debug!("FPGA is ready."),
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Ok(_) => debug!("FPGA is in reset state."),
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Err(_) => debug!("Error: Cannot read C_DONE"),
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};
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// Setup Urukul
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/*
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* Using SPI1, AF5
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* SCLK -> PA5
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* MOSI -> PB5
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* MISO -> PA6
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* CS -> 0: PB12, 1: PA15, 2: PC7
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*/
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let sclk = gpioa.pa5.into_alternate_af5();
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let mosi = gpiob.pb5.into_alternate_af5();
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let miso = gpioa.pa6.into_alternate_af5();
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let (cs0, cs1, cs2) = (
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gpiob.pb12.into_push_pull_output(),
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gpioa.pa15.into_push_pull_output(),
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gpioc.pc7.into_push_pull_output(),
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);
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/*
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* I/O_Update -> PB15
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*/
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let io_update = gpiob.pb15.into_push_pull_output();
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let spi = dp.SPI1.spi(
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(sclk, miso, mosi),
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spi::MODE_0,
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3.mhz(),
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ccdr.peripheral.SPI1,
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&ccdr.clocks,
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);
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let switch = CPLD::new(spi, (cs0, cs1, cs2), io_update);
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let parts = switch.split();
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let mut urukul = Urukul::new(
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parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7
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);
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// Setup ethernet pins
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setup_ethernet_pins(
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gpioa.pa1, gpioa.pa2, gpioc.pc1, gpioa.pa7, gpioc.pc4,
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gpioc.pc5, gpiog.pg11, gpiog.pg13, gpiob.pb13
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);
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// Initialise ethernet...
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assert_eq!(ccdr.clocks.hclk().0, 200_000_000); // HCLK 200MHz
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assert_eq!(ccdr.clocks.pclk1().0, 100_000_000); // PCLK 100MHz
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assert_eq!(ccdr.clocks.pclk2().0, 100_000_000); // PCLK 100MHz
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assert_eq!(ccdr.clocks.pclk4().0, 100_000_000); // PCLK 100MHz
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let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
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let (_eth_dma, mut eth_mac) = unsafe {
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ethernet::new_unchecked(
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dp.ETHERNET_MAC,
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dp.ETHERNET_MTL,
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dp.ETHERNET_DMA,
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&mut DES_RING,
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mac_addr.clone(),
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)
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};
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unsafe {
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ethernet::enable_interrupt();
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cp.NVIC.set_priority(stm32::Interrupt::ETH, 196); // Mid prio
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cortex_m::peripheral::NVIC::unmask(stm32::Interrupt::ETH);
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}
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// ----------------------------------------------------------
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// Begin periodic tasks
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systick_init(&mut delay.free(), ccdr.clocks);
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unsafe {
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cp.SCB.shpr[15 - 4].write(128);
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} // systick exception priority
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// ----------------------------------------------------------
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// Main application loop
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// Setup addresses, maybe not MAC?
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// MAC is set up in prior
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let local_addr = IpAddress::v4(192, 168, 1, 200);
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let mut ip_addrs = [IpCidr::new(local_addr, 24)];
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// let neighbor_cache = NeighborCache::new(BTreeMap::new());
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let mut neighbor_storage = [None; 16];
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let neighbor_cache = NeighborCache::new(&mut neighbor_storage[..]);
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// Device? _eth_dma, as it implements phy::device
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let mut iface = EthernetInterfaceBuilder::new(_eth_dma)
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.ethernet_addr(mac_addr)
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.neighbor_cache(neighbor_cache)
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.ip_addrs(&mut ip_addrs[..])
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.finalize();
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// SCPI configs: migrated to scpi.rs, not meant to be touched
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let tree = scpi_tree!();
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// Device was declared in prior
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let mut errors = ArrayErrorQueue::<[Error; 10]>::new();
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let mut context = Context::new(&mut urukul, &mut errors, tree);
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//Response bytebuffer
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let mut buf = ArrayVecFormatter::<[u8; 256]>::new();
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// SCPI configs END
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// TCP socket buffers
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let mut rx_storage = [0; BUFFER_SIZE];
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let mut tx_storage = [0; BUFFER_SIZE];
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// Setup TCP sockets
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let tcp1_rx_buffer = TcpSocketBuffer::new(&mut rx_storage[..]);
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let tcp1_tx_buffer = TcpSocketBuffer::new(&mut tx_storage[..]);
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let mut tcp1_socket = TcpSocket::new(tcp1_rx_buffer, tcp1_tx_buffer);
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// Setup a silent socket
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let mut silent_rx_storage = [0; BUFFER_SIZE];
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let mut silent_tx_storage = [0; BUFFER_SIZE];
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let silent_rx_buffer = TcpSocketBuffer::new(&mut silent_rx_storage[..]);
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let silent_tx_buffer = TcpSocketBuffer::new(&mut silent_tx_storage[..]);
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let mut silent_socket = TcpSocket::new(silent_rx_buffer, silent_tx_buffer);
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// Socket storage
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let mut sockets_storage = [ None, None ];
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let mut sockets = SocketSet::new(&mut sockets_storage[..]);
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let tcp1_handle = sockets.add(tcp1_socket);
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let silent_handle = sockets.add(silent_socket);
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let mut handles: [SocketHandle; SOCKET_COUNT] = unsafe {
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uninitialized()
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};
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let mut eth_up = false;
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loop {
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let _time = TIME.load(Ordering::Relaxed);
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let eth_last = eth_up;
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match iface.poll(&mut sockets, Instant::from_millis(_time as i64)) {
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Ok(_) => {
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eth_up = true;
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},
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Err(e) => {
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eth_up = false;
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},
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};
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// SCPI interaction socket (:7000)
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{
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let mut socket = sockets.get::<TcpSocket>(silent_handle);
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if !socket.is_open() {
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socket.listen(7000).unwrap();
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socket.set_timeout(Some(Duration::from_millis(1000000)));
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}
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if socket.can_recv() {
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let data = socket.recv(|buffer| {
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(buffer.len(), buffer)
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}).unwrap();
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if str::from_utf8(data).unwrap().trim() == "quit" {
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socket.close();
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socket.abort();
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continue;
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}
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let result = context.run(data, &mut buf);
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if let Err(err) = result {
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writeln!(socket, "{}", str::from_utf8(err.get_message()).unwrap()).unwrap();
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} else {
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write!(socket, "{}", str::from_utf8(buf.as_slice()).unwrap()).unwrap();
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}
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}
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}
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}
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}
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use stm32h7xx_hal::gpio::{
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gpioa::{PA1, PA2, PA7},
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gpiob::{PB13},
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gpioc::{PC1, PC4, PC5},
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gpiog::{PG11, PG13},
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Speed::VeryHigh,
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};
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/*
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* Migrated ethernet setup pins
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*/
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#[allow(non_camel_case_types)]
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pub fn setup_ethernet_pins<REF_CLK, MDIO, MDC, CRS_DV, RXD0, RXD1, TX_EN, TXD0, TXD1>(
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pa1: PA1<REF_CLK>, pa2: PA2<MDIO>, pc1: PC1<MDC>, pa7: PA7<CRS_DV>, pc4: PC4<RXD0>,
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pc5: PC5<RXD1>, pg11: PG11<TX_EN>, pg13: PG13<TXD0>, pb13: PB13<TXD1>
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) {
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pa1.into_alternate_af11().set_speed(VeryHigh);
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pa2.into_alternate_af11().set_speed(VeryHigh);
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pc1.into_alternate_af11().set_speed(VeryHigh);
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pa7.into_alternate_af11().set_speed(VeryHigh);
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pc4.into_alternate_af11().set_speed(VeryHigh);
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pc5.into_alternate_af11().set_speed(VeryHigh);
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pg11.into_alternate_af11().set_speed(VeryHigh);
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pg13.into_alternate_af11().set_speed(VeryHigh);
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pb13.into_alternate_af11().set_speed(VeryHigh);
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}
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#[interrupt]
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fn ETH() {
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unsafe { ethernet::interrupt_handler() }
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}
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#[exception]
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fn SysTick() {
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TIME.fetch_add(1, Ordering::Relaxed);
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}
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#[exception]
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fn HardFault(ef: &cortex_m_rt::ExceptionFrame) -> ! {
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panic!("HardFault at {:#?}", ef);
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}
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#[exception]
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fn DefaultHandler(irqn: i16) {
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panic!("Unhandled exception (IRQn = {})", irqn);
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}
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@ -1,79 +0,0 @@
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#![no_main]
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#![no_std]
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extern crate log;
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use log::debug;
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use stm32h7xx_hal::{pac, prelude::*, spi};
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use cortex_m;
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use cortex_m::asm::nop;
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use cortex_m_rt::entry;
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use firmware::flash::flash_ice40_fpga;
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#[path = "util/logger.rs"]
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mod logger;
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#[entry]
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fn main() -> ! {
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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let pwr = dp.PWR.constrain();
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let vos = pwr.freeze();
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let rcc = dp.RCC.constrain();
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let ccdr = rcc
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.sys_ck(400.mhz())
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.pll1_q_ck(48.mhz())
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.pll1_r_ck(400.mhz()) // for TRACECK
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.freeze(vos, &dp.SYSCFG);
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unsafe {
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logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
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}
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let delay = cp.SYST.delay(ccdr.clocks);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
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let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
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// gpiob.pb3.into_alternate_af0().set_speed(Speed::VeryHigh);
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logger::init();
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debug!("Flashing configuration bitstream to iCE40 HX8K on Humpback.");
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// Using SPI_1 alternate functions (af5)
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let fpga_sck = gpiob.pb3.into_alternate_af5();
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let fpga_sdo = gpiob.pb4.into_alternate_af5();
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let fpga_sdi = gpiob.pb5.into_alternate_af5();
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// Setup SPI_SS_B and CRESET_B
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let fpga_ss = gpioa.pa4.into_push_pull_output();
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let fpga_creset = gpiof.pf3.into_open_drain_output();
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// Setup CDONE
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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// Setup SPI interface
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let fpga_cfg_spi = dp.SPI1.spi(
|
||||
(fpga_sck, fpga_sdo, fpga_sdi),
|
||||
spi::MODE_3,
|
||||
12.mhz(),
|
||||
ccdr.peripheral.SPI1,
|
||||
&ccdr.clocks,
|
||||
);
|
||||
|
||||
// Pre-load the configuration bytes
|
||||
let config_data = include_bytes!("../build/top.bin");
|
||||
|
||||
flash_ice40_fpga(fpga_cfg_spi, fpga_ss, fpga_creset, fpga_cdone, delay, config_data).unwrap();
|
||||
|
||||
loop {
|
||||
nop();
|
||||
}
|
||||
}
|
||||
|
|
@ -1,249 +0,0 @@
|
|||
#![no_std]
|
||||
#![no_main]
|
||||
|
||||
use log::{info, warn};
|
||||
|
||||
use smoltcp as net;
|
||||
use stm32h7xx_hal::ethernet;
|
||||
use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
|
||||
|
||||
use heapless::consts;
|
||||
|
||||
use cortex_m;
|
||||
use cortex_m_rt::entry;
|
||||
use rtic::cyccnt::{Instant, U32Ext};
|
||||
|
||||
use minimq::{
|
||||
embedded_nal::{IpAddr, Ipv4Addr, TcpStack},
|
||||
MqttClient, QoS
|
||||
};
|
||||
|
||||
use firmware::nal_tcp_client::{NetworkStack, NetStorage};
|
||||
use firmware::{
|
||||
cpld::{
|
||||
CPLD,
|
||||
},
|
||||
};
|
||||
use firmware::Urukul;
|
||||
use firmware::mqtt_mux::MqttMux;
|
||||
|
||||
#[path = "util/logger.rs"]
|
||||
mod logger;
|
||||
|
||||
static mut NET_STORE: NetStorage = NetStorage {
|
||||
// Placeholder for the real IP address, which is initialized at runtime.
|
||||
ip_addrs: [net::wire::IpCidr::Ipv6(
|
||||
net::wire::Ipv6Cidr::SOLICITED_NODE_PREFIX,
|
||||
)],
|
||||
neighbor_cache: [None; 8],
|
||||
routes_cache: [None; 8],
|
||||
};
|
||||
|
||||
#[link_section = ".sram3.eth"]
|
||||
static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
|
||||
|
||||
macro_rules! add_socket {
|
||||
($sockets:ident, $tx_storage:ident, $rx_storage:ident) => {
|
||||
let mut $rx_storage = [0; 4096];
|
||||
let mut $tx_storage = [0; 4096];
|
||||
|
||||
let tcp_socket = {
|
||||
let tx_buffer = net::socket::TcpSocketBuffer::new(&mut $tx_storage[..]);
|
||||
let rx_buffer = net::socket::TcpSocketBuffer::new(&mut $rx_storage[..]);
|
||||
|
||||
net::socket::TcpSocket::new(tx_buffer, rx_buffer)
|
||||
};
|
||||
|
||||
let _handle = $sockets.add(tcp_socket);
|
||||
};
|
||||
}
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let mut cp = cortex_m::Peripherals::take().unwrap();
|
||||
let dp = pac::Peripherals::take().unwrap();
|
||||
|
||||
cp.DWT.enable_cycle_counter();
|
||||
|
||||
// Enable SRAM3 for the descriptor ring.
|
||||
dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
|
||||
// Reset RCC clock
|
||||
dp.RCC.rsr.write(|w| w.rmvf().set_bit());
|
||||
|
||||
let pwr = dp.PWR.constrain();
|
||||
let vos = pwr.freeze();
|
||||
|
||||
let rcc = dp.RCC.constrain();
|
||||
let ccdr = rcc
|
||||
.use_hse(8.mhz())
|
||||
.sysclk(400.mhz())
|
||||
.hclk(200.mhz())
|
||||
.pll1_q_ck(48.mhz()) // for SPI
|
||||
.pll1_r_ck(400.mhz()) // for TRACECK
|
||||
.freeze(vos, &dp.SYSCFG);
|
||||
|
||||
unsafe {
|
||||
logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
|
||||
}
|
||||
logger::init();
|
||||
// let mut delay = cp.SYST.delay(ccdr.clocks);
|
||||
|
||||
let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
|
||||
let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
|
||||
let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
|
||||
let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
|
||||
let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
|
||||
let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
|
||||
let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
|
||||
|
||||
// Configure ethernet IO
|
||||
{
|
||||
let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
}
|
||||
|
||||
// Configure ethernet
|
||||
let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
|
||||
let (eth_dma, mut eth_mac) = unsafe {
|
||||
ethernet::new_unchecked(
|
||||
dp.ETHERNET_MAC,
|
||||
dp.ETHERNET_MTL,
|
||||
dp.ETHERNET_DMA,
|
||||
&mut DES_RING,
|
||||
mac_addr.clone(),
|
||||
)
|
||||
};
|
||||
|
||||
unsafe { ethernet::enable_interrupt() }
|
||||
|
||||
let store = unsafe { &mut NET_STORE };
|
||||
|
||||
store.ip_addrs[0] = net::wire::IpCidr::new(net::wire::IpAddress::v4(192, 168, 1, 200), 24);
|
||||
|
||||
let neighbor_cache = net::iface::NeighborCache::new(&mut store.neighbor_cache[..]);
|
||||
|
||||
let mut routes = net::iface::Routes::new(&mut store.routes_cache[..]);
|
||||
let default_v4_gw = net::wire::Ipv4Address::new(192, 168, 1, 1);
|
||||
routes.add_default_ipv4_route(default_v4_gw).unwrap();
|
||||
|
||||
let mut net_interface = net::iface::EthernetInterfaceBuilder::new(eth_dma)
|
||||
.ethernet_addr(mac_addr)
|
||||
.neighbor_cache(neighbor_cache)
|
||||
.ip_addrs(&mut store.ip_addrs[..])
|
||||
.routes(routes)
|
||||
.finalize();
|
||||
|
||||
/*
|
||||
* Using SPI1, AF5
|
||||
* SCLK -> PA5
|
||||
* MOSI -> PB5
|
||||
* MISO -> PA6
|
||||
* CS -> 0: PB12, 1: PA15, 2: PC7
|
||||
* I/O_Update -> PB15
|
||||
*/
|
||||
let sclk = gpioa.pa5.into_alternate_af5();
|
||||
let mosi = gpiob.pb5.into_alternate_af5();
|
||||
let miso = gpioa.pa6.into_alternate_af5();
|
||||
|
||||
let (cs0, cs1, cs2) = (
|
||||
gpiob.pb12.into_push_pull_output(),
|
||||
gpioa.pa15.into_push_pull_output(),
|
||||
gpioc.pc7.into_push_pull_output(),
|
||||
);
|
||||
|
||||
let io_update = gpiob.pb15.into_push_pull_output();
|
||||
|
||||
let spi = dp.SPI1.spi(
|
||||
(sclk, miso, mosi),
|
||||
spi::MODE_0,
|
||||
3.mhz(),
|
||||
ccdr.peripheral.SPI1,
|
||||
&ccdr.clocks,
|
||||
);
|
||||
|
||||
let cpld = CPLD::new(spi, (cs0, cs1, cs2), io_update);
|
||||
let parts = cpld.split();
|
||||
|
||||
let urukul = Urukul::new(
|
||||
parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7
|
||||
);
|
||||
|
||||
cp.SCB.invalidate_icache();
|
||||
cp.SCB.enable_icache();
|
||||
|
||||
let mut mqtt_mux = MqttMux::new(urukul);
|
||||
|
||||
// Time unit in ms
|
||||
let mut time: u32 = 0;
|
||||
|
||||
// Cycle counter for 1 ms
|
||||
// This effectively provides a conversion from rtic unit to ms
|
||||
let mut next_ms = Instant::now();
|
||||
next_ms += 400_000.cycles();
|
||||
|
||||
let mut socket_set_entries: [_; 8] = Default::default();
|
||||
let mut sockets = net::socket::SocketSet::new(&mut socket_set_entries[..]);
|
||||
add_socket!(sockets, rx_storage, tx_storage);
|
||||
|
||||
let tcp_stack = NetworkStack::new(&mut net_interface, sockets);
|
||||
|
||||
// Case dealt: Ethernet connection break down, neither side has timeout
|
||||
// Limitation: Timeout inequality will cause TCP socket state to desync
|
||||
// Probably fixed in latest smoltcp commit
|
||||
let mut client = MqttClient::<consts::U256, _>::new(
|
||||
IpAddr::V4(Ipv4Addr::new(192, 168, 1, 125)),
|
||||
"Nucleo",
|
||||
tcp_stack,
|
||||
)
|
||||
.unwrap();
|
||||
|
||||
let mut tick = false;
|
||||
let mut has_subscribed = false;
|
||||
|
||||
loop {
|
||||
// Update time accumulator in ms
|
||||
// Tick once every ms
|
||||
if Instant::now() > next_ms {
|
||||
tick = true;
|
||||
time += 1;
|
||||
next_ms += 400_000.cycles();
|
||||
}
|
||||
|
||||
// eth Poll if necessary
|
||||
// Do not poll if eth link is down
|
||||
if tick && client.network_stack.update_delay(time) == 0 && eth_mac.phy_poll_link() {
|
||||
client.network_stack.update(time);
|
||||
}
|
||||
|
||||
// Process MQTT messages about Urukul/Control
|
||||
let connection = client
|
||||
.poll(|_client, topic, message, _properties| {
|
||||
info!("On {:?}, received: {:?}", topic, message);
|
||||
// Why is topic a string while message is a slice?
|
||||
mqtt_mux.process_mqtt(topic, message);
|
||||
}).is_ok();
|
||||
|
||||
if connection && !has_subscribed && tick {
|
||||
match client.subscribe("Urukul/Control/#", &[]) {
|
||||
Ok(()) => has_subscribed = true,
|
||||
Err(minimq::Error::NotReady) => {},
|
||||
e => warn!("{:?}", e),
|
||||
};
|
||||
}
|
||||
|
||||
if connection && tick && (time % 3000) == 0 {
|
||||
info!("Feedback from print publish: {:?}", client
|
||||
.publish("Channel1/Switch", "Hello, World!".as_bytes(), QoS::AtMostOnce, &[]));
|
||||
}
|
||||
|
||||
// Reset tick flag
|
||||
tick = false;
|
||||
}
|
||||
}
|
||||
|
|
@ -1,266 +0,0 @@
|
|||
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
|
||||
#[macro_use]
|
||||
extern crate log;
|
||||
|
||||
use smoltcp as net;
|
||||
// use stm32h7_ethernet as ethernet;
|
||||
use stm32h7xx_hal::{gpio::Speed, prelude::*, ethernet};
|
||||
|
||||
use heapless::{consts, String};
|
||||
// use si7021::Si7021;
|
||||
|
||||
use cortex_m;
|
||||
|
||||
use panic_halt as _;
|
||||
// use serde::{Deserialize, Serialize};
|
||||
|
||||
use rtic::cyccnt::{Instant, U32Ext};
|
||||
|
||||
mod tcp_stack;
|
||||
|
||||
#[path = "util/logger.rs"]
|
||||
mod logger;
|
||||
|
||||
use minimq::{
|
||||
embedded_nal::{IpAddr, Ipv4Addr},
|
||||
MqttClient, QoS,
|
||||
};
|
||||
use tcp_stack::NetworkStack;
|
||||
|
||||
pub struct NetStorage {
|
||||
ip_addrs: [net::wire::IpCidr; 1],
|
||||
neighbor_cache: [Option<(net::wire::IpAddress, net::iface::Neighbor)>; 8],
|
||||
}
|
||||
|
||||
static mut NET_STORE: NetStorage = NetStorage {
|
||||
// Placeholder for the real IP address, which is initialized at runtime.
|
||||
ip_addrs: [net::wire::IpCidr::Ipv6(
|
||||
net::wire::Ipv6Cidr::SOLICITED_NODE_PREFIX,
|
||||
)],
|
||||
neighbor_cache: [None; 8],
|
||||
};
|
||||
|
||||
#[link_section = ".sram3.eth"]
|
||||
static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
|
||||
|
||||
// #[derive(Serialize, Deserialize)]
|
||||
// struct Temperature {
|
||||
// temperature_c: f32,
|
||||
// }
|
||||
|
||||
type NetworkInterface =
|
||||
net::iface::EthernetInterface<'static, 'static, 'static, ethernet::EthernetDMA<'static>>;
|
||||
|
||||
macro_rules! add_socket {
|
||||
($sockets:ident, $tx_storage:ident, $rx_storage:ident) => {
|
||||
let mut $rx_storage = [0; 4096];
|
||||
let mut $tx_storage = [0; 4096];
|
||||
|
||||
let tcp_socket = {
|
||||
let tx_buffer = net::socket::TcpSocketBuffer::new(&mut $tx_storage[..]);
|
||||
let rx_buffer = net::socket::TcpSocketBuffer::new(&mut $rx_storage[..]);
|
||||
|
||||
net::socket::TcpSocket::new(tx_buffer, rx_buffer)
|
||||
};
|
||||
|
||||
let _handle = $sockets.add(tcp_socket);
|
||||
};
|
||||
}
|
||||
|
||||
// #[cfg(not(feature = "semihosting"))]
|
||||
// fn init_log() {}
|
||||
|
||||
// #[cfg(feature = "semihosting")]
|
||||
// fn init_log() {
|
||||
// use cortex_m_log::log::{init as init_log, Logger};
|
||||
// use cortex_m_log::printer::semihosting::{hio::HStdout, InterruptOk};
|
||||
// use log::LevelFilter;
|
||||
|
||||
// static mut LOGGER: Option<Logger<InterruptOk<HStdout>>> = None;
|
||||
|
||||
// let logger = Logger {
|
||||
// inner: InterruptOk::<_>::stdout().unwrap(),
|
||||
// level: LevelFilter::Info,
|
||||
// };
|
||||
|
||||
// let logger = unsafe { LOGGER.get_or_insert(logger) };
|
||||
|
||||
// init_log(logger).unwrap();
|
||||
// }
|
||||
|
||||
#[rtic::app(device = stm32h7xx_hal::stm32, peripherals = true, monotonic = rtic::cyccnt::CYCCNT)]
|
||||
const APP: () = {
|
||||
struct Resources {
|
||||
net_interface: NetworkInterface,
|
||||
// si7021: Si7021<stm32h7xx_hal::i2c::I2c<stm32h7xx_hal::stm32::I2C2>>,
|
||||
}
|
||||
|
||||
#[init]
|
||||
fn init(c: init::Context) -> init::LateResources {
|
||||
let mut cp = unsafe {
|
||||
cortex_m::Peripherals::steal()
|
||||
};
|
||||
cp.DWT.enable_cycle_counter();
|
||||
|
||||
// Enable SRAM3 for the descriptor ring.
|
||||
c.device.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
|
||||
|
||||
let rcc = c.device.RCC.constrain();
|
||||
let pwr = c.device.PWR.constrain();
|
||||
let vos = pwr.freeze();
|
||||
|
||||
let ccdr = rcc
|
||||
.sysclk(400.mhz())
|
||||
.hclk(200.mhz())
|
||||
.per_ck(100.mhz())
|
||||
.pll1_r_ck(400.mhz()) // for TRACECK
|
||||
.pll2_p_ck(100.mhz())
|
||||
.pll2_q_ck(100.mhz())
|
||||
.freeze(vos, &c.device.SYSCFG);
|
||||
|
||||
unsafe {
|
||||
logger::enable_itm(&c.device.DBGMCU, &mut cp.DCB, &mut cp.ITM);
|
||||
}
|
||||
logger::init();
|
||||
|
||||
let gpioa = c.device.GPIOA.split(ccdr.peripheral.GPIOA);
|
||||
let gpiob = c.device.GPIOB.split(ccdr.peripheral.GPIOB);
|
||||
let gpioc = c.device.GPIOC.split(ccdr.peripheral.GPIOC);
|
||||
let gpiof = c.device.GPIOF.split(ccdr.peripheral.GPIOF);
|
||||
let gpiog = c.device.GPIOG.split(ccdr.peripheral.GPIOG);
|
||||
|
||||
// Configure ethernet IO
|
||||
{
|
||||
let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
}
|
||||
|
||||
// Configure ethernet
|
||||
let net_interface = {
|
||||
let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
|
||||
let (eth_dma, mut _eth_mac) = unsafe {
|
||||
ethernet::new_unchecked(
|
||||
c.device.ETHERNET_MAC,
|
||||
c.device.ETHERNET_MTL,
|
||||
c.device.ETHERNET_DMA,
|
||||
&mut DES_RING,
|
||||
mac_addr.clone(),
|
||||
)
|
||||
};
|
||||
|
||||
while !_eth_mac.phy_poll_link() {}
|
||||
|
||||
unsafe { ethernet::enable_interrupt() }
|
||||
|
||||
let store = unsafe { &mut NET_STORE };
|
||||
|
||||
store.ip_addrs[0] = net::wire::IpCidr::new(net::wire::IpAddress::v4(192, 168, 1, 200), 24);
|
||||
|
||||
let neighbor_cache = net::iface::NeighborCache::new(&mut store.neighbor_cache[..]);
|
||||
|
||||
net::iface::EthernetInterfaceBuilder::new(eth_dma)
|
||||
.ethernet_addr(mac_addr)
|
||||
.neighbor_cache(neighbor_cache)
|
||||
.ip_addrs(&mut store.ip_addrs[..])
|
||||
.finalize()
|
||||
};
|
||||
|
||||
// Configure I2C
|
||||
// let si7021 = {
|
||||
// let i2c_sda = gpiof.pf0.into_open_drain_output().into_alternate_af4();
|
||||
// let i2c_scl = gpiof.pf1.into_open_drain_output().into_alternate_af4();
|
||||
// let i2c = c.device.I2C2.i2c(
|
||||
// (i2c_scl, i2c_sda),
|
||||
// 100.khz(),
|
||||
// ccdr.peripheral.I2C2,
|
||||
// &ccdr.clocks,
|
||||
// );
|
||||
|
||||
// Si7021::new(i2c)
|
||||
// };
|
||||
|
||||
cp.SCB.enable_icache();
|
||||
|
||||
init::LateResources {
|
||||
net_interface: net_interface,
|
||||
// si7021: si7021,
|
||||
}
|
||||
}
|
||||
|
||||
#[idle(resources=[net_interface])]
|
||||
fn idle(c: idle::Context) -> ! {
|
||||
let mut time: u32 = 0;
|
||||
let mut next_ms = Instant::now();
|
||||
|
||||
next_ms += 400_00.cycles();
|
||||
|
||||
let mut socket_set_entries: [_; 8] = Default::default();
|
||||
let mut sockets = net::socket::SocketSet::new(&mut socket_set_entries[..]);
|
||||
add_socket!(sockets, rx_storage, tx_storage);
|
||||
|
||||
let tcp_stack = NetworkStack::new(c.resources.net_interface, sockets);
|
||||
let mut client = MqttClient::<consts::U256, _>::new(
|
||||
IpAddr::V4(Ipv4Addr::new(192, 168, 1, 125)),
|
||||
"nucleo",
|
||||
tcp_stack,
|
||||
)
|
||||
.unwrap();
|
||||
|
||||
loop {
|
||||
let tick = Instant::now() > next_ms;
|
||||
|
||||
if tick {
|
||||
next_ms += 400_000.cycles();
|
||||
time += 1;
|
||||
}
|
||||
|
||||
if tick && (time % 1000) == 0 {
|
||||
client
|
||||
.publish("nucleo", "Hello, World!".as_bytes(), QoS::AtMostOnce, &[])
|
||||
.unwrap();
|
||||
|
||||
// let temperature = Temperature {
|
||||
// temperature_c: c.resources.si7021.temperature_celsius().unwrap(),
|
||||
// };
|
||||
// let temperature: String<consts::U256> =
|
||||
// serde_json_core::to_string(&temperature).unwrap();
|
||||
// client
|
||||
// .publish(
|
||||
// "temperature",
|
||||
// &temperature.into_bytes(),
|
||||
// QoS::AtMostOnce,
|
||||
// &[],
|
||||
// )
|
||||
// .unwrap();
|
||||
}
|
||||
|
||||
client
|
||||
.poll(|_client, topic, message, _properties| match topic {
|
||||
_ => info!("On '{:?}', received: {:?}", topic, message),
|
||||
});
|
||||
// .unwrap();
|
||||
|
||||
// Update the TCP stack.
|
||||
let sleep = client.network_stack.update(time);
|
||||
if sleep {
|
||||
//cortex_m::asm::wfi();
|
||||
cortex_m::asm::nop();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#[task(binds=ETH)]
|
||||
fn eth(_: eth::Context) {
|
||||
unsafe { ethernet::interrupt_handler() }
|
||||
}
|
||||
};
|
||||
|
|
@ -1,292 +0,0 @@
|
|||
#![no_std]
|
||||
#![no_main]
|
||||
|
||||
#[macro_use]
|
||||
extern crate log;
|
||||
|
||||
#[macro_use]
|
||||
extern crate lazy_static;
|
||||
|
||||
use smoltcp as net;
|
||||
use stm32h7xx_hal::ethernet;
|
||||
use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
|
||||
use embedded_hal::{
|
||||
blocking::spi::Transfer,
|
||||
digital::v2::OutputPin,
|
||||
};
|
||||
|
||||
use core::sync::atomic::{AtomicU32, Ordering};
|
||||
use core::fmt::Write;
|
||||
use core::str;
|
||||
|
||||
// use heapless::{consts, String};
|
||||
|
||||
use cortex_m;
|
||||
use cortex_m::iprintln;
|
||||
use cortex_m_rt::{
|
||||
entry,
|
||||
exception,
|
||||
};
|
||||
// use cortex_m_semihosting::hprintln;
|
||||
|
||||
// use panic_halt as _;
|
||||
use panic_itm as _;
|
||||
|
||||
use rtic::cyccnt::{Instant, U32Ext};
|
||||
|
||||
use log::info;
|
||||
use log::debug;
|
||||
use log::trace;
|
||||
use log::warn;
|
||||
|
||||
use nb::block;
|
||||
|
||||
use minimq::{
|
||||
embedded_nal::{IpAddr, Ipv4Addr, TcpStack, SocketAddr, Mode},
|
||||
MqttClient, QoS,
|
||||
};
|
||||
|
||||
use firmware::nal_tcp_client::{NetworkStack, NetStorage, NetworkInterface};
|
||||
use firmware::{Urukul};
|
||||
use firmware::cpld::{CPLD};
|
||||
|
||||
#[link_section = ".sram3.eth"]
|
||||
static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
|
||||
|
||||
// Logging setup
|
||||
#[path = "util/logger.rs"]
|
||||
mod logger;
|
||||
#[path = "util/clock.rs"]
|
||||
mod clock;
|
||||
// End of logging setup
|
||||
|
||||
// static TIME: AtomicU32 = AtomicU32::new(0);
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
|
||||
// logger::semihosting_init();
|
||||
let clock = clock::Clock::new();
|
||||
|
||||
let mut cp = cortex_m::Peripherals::take().unwrap();
|
||||
let dp = pac::Peripherals::take().unwrap();
|
||||
|
||||
cp.DWT.enable_cycle_counter();
|
||||
|
||||
// Enable SRAM3 for the descriptor ring.
|
||||
dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
|
||||
// Reset RCC clock
|
||||
dp.RCC.rsr.write(|w| w.rmvf().set_bit());
|
||||
|
||||
let pwr = dp.PWR.constrain();
|
||||
let vos = pwr.freeze();
|
||||
|
||||
let rcc = dp.RCC.constrain();
|
||||
let ccdr = rcc
|
||||
.use_hse(8.mhz())
|
||||
.sysclk(400.mhz())
|
||||
.hclk(200.mhz())
|
||||
// .per_ck(100.mhz())
|
||||
.pll1_q_ck(48.mhz()) // for SPI
|
||||
.pll1_r_ck(400.mhz()) // for TRACECK
|
||||
// .pll2_p_ck(100.mhz())
|
||||
// .pll2_q_ck(100.mhz())
|
||||
.freeze(vos, &dp.SYSCFG);
|
||||
|
||||
unsafe {
|
||||
logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
|
||||
}
|
||||
|
||||
let mut delay = cp.SYST.delay(ccdr.clocks);
|
||||
|
||||
let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
|
||||
let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
|
||||
let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
|
||||
let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
|
||||
let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
|
||||
let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
|
||||
let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
|
||||
|
||||
let mut yellow_led = gpioe.pe1.into_push_pull_output();
|
||||
yellow_led.set_low().unwrap();
|
||||
let mut red_led = gpiob.pb14.into_push_pull_output();
|
||||
red_led.set_high().unwrap();
|
||||
let mut green_led = gpiob.pb0.into_push_pull_output();
|
||||
green_led.set_low().unwrap();
|
||||
|
||||
// gpiob.pb3.into_alternate_af0().set_speed(Speed::VeryHigh);
|
||||
|
||||
logger::init();
|
||||
|
||||
// Configure ethernet IO
|
||||
{
|
||||
let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
}
|
||||
|
||||
// Configure ethernet
|
||||
let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
|
||||
let (eth_dma, mut eth_mac) = unsafe {
|
||||
ethernet::new_unchecked(
|
||||
dp.ETHERNET_MAC,
|
||||
dp.ETHERNET_MTL,
|
||||
dp.ETHERNET_DMA,
|
||||
&mut DES_RING,
|
||||
mac_addr.clone(),
|
||||
)
|
||||
};
|
||||
|
||||
unsafe { ethernet::enable_interrupt() }
|
||||
|
||||
let mut ip_addrs = [net::wire::IpCidr::new(net::wire::IpAddress::v4(192, 168, 1, 200), 24)];
|
||||
|
||||
let mut neighbor_cache_entries = [None; 8];
|
||||
let mut neighbor_cache = net::iface::NeighborCache::new(&mut neighbor_cache_entries[..]);
|
||||
neighbor_cache.fill(
|
||||
net::wire::IpAddress::v4(192, 168, 1, 125),
|
||||
net::wire::EthernetAddress([0x2C, 0xF0, 0x5D, 0x26, 0xB8, 0x2F]),
|
||||
clock.elapsed(),
|
||||
);
|
||||
|
||||
let mut net_interface = net::iface::EthernetInterfaceBuilder::new(eth_dma)
|
||||
.ethernet_addr(mac_addr)
|
||||
.neighbor_cache(neighbor_cache)
|
||||
.ip_addrs(&mut ip_addrs[..])
|
||||
.finalize();
|
||||
|
||||
/*
|
||||
* Using SPI1, AF5
|
||||
* SCLK -> PA5
|
||||
* MOSI -> PB5
|
||||
* MISO -> PA6
|
||||
* CS -> 0: PB12, 1: PA15, 2: PC7
|
||||
* I/O_Update -> PB15
|
||||
*/
|
||||
let sclk = gpioa.pa5.into_alternate_af5();
|
||||
let mosi = gpiob.pb5.into_alternate_af5();
|
||||
let miso = gpioa.pa6.into_alternate_af5();
|
||||
|
||||
let (cs0, cs1, cs2) = (
|
||||
gpiob.pb12.into_push_pull_output(),
|
||||
gpioa.pa15.into_push_pull_output(),
|
||||
gpioc.pc7.into_push_pull_output(),
|
||||
);
|
||||
|
||||
let io_update = gpiob.pb15.into_push_pull_output();
|
||||
|
||||
let spi = dp.SPI1.spi(
|
||||
(sclk, miso, mosi),
|
||||
spi::MODE_0,
|
||||
3.mhz(),
|
||||
ccdr.peripheral.SPI1,
|
||||
&ccdr.clocks,
|
||||
);
|
||||
|
||||
let cpld = CPLD::new(spi, (cs0, cs1, cs2), io_update);
|
||||
let parts = cpld.split();
|
||||
|
||||
let urukul = Urukul::new(
|
||||
parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7,
|
||||
[25_000_000, 25_000_000, 25_000_000, 25_000_000]
|
||||
);
|
||||
|
||||
cp.SCB.invalidate_icache();
|
||||
cp.SCB.enable_icache();
|
||||
|
||||
// let mut time: u32 = 0;
|
||||
// let mut next_ms = Instant::now();
|
||||
|
||||
// next_ms += 400_000.cycles();
|
||||
|
||||
let mut socket_set_entries: [_; 8] = Default::default();
|
||||
let mut sockets = net::socket::SocketSet::new(&mut socket_set_entries[..]);
|
||||
|
||||
let mut rx_storage = [0; 4096];
|
||||
let mut tx_storage = [0; 4096];
|
||||
|
||||
let tcp_socket = {
|
||||
let tx_buffer = net::socket::TcpSocketBuffer::new(&mut tx_storage[..]);
|
||||
let rx_buffer = net::socket::TcpSocketBuffer::new(&mut rx_storage[..]);
|
||||
|
||||
net::socket::TcpSocket::new(tx_buffer, rx_buffer)
|
||||
};
|
||||
let handle = sockets.add(tcp_socket);
|
||||
|
||||
// delay.delay_ms(2000_u16);
|
||||
green_led.set_high().unwrap();
|
||||
|
||||
{
|
||||
let mut socket = sockets.get::<net::socket::TcpSocket>(handle);
|
||||
socket.connect((net::wire::IpAddress::v4(192, 168, 1, 125), 1883), 49500).unwrap();
|
||||
socket.set_timeout(Some(net::time::Duration::from_millis(2000)));
|
||||
debug!("connect!");
|
||||
}
|
||||
|
||||
yellow_led.set_low().unwrap();
|
||||
red_led.set_high().unwrap();
|
||||
|
||||
let mut green = true;
|
||||
let mut connected = false;
|
||||
|
||||
debug!("Poll link status: {}", eth_mac.phy_poll_link());
|
||||
while !eth_mac.phy_poll_link() {}
|
||||
debug!("Poll link status: {}", eth_mac.phy_poll_link());
|
||||
|
||||
loop {
|
||||
// let timestamp = net::time::Instant::from_millis(TIME.load(Ordering::Relaxed) as i64);
|
||||
while !eth_mac.phy_poll_link() {}
|
||||
match net_interface.poll(&mut sockets, clock.elapsed()) {
|
||||
Ok(_) => {},
|
||||
Err(e) => {
|
||||
debug!("poll error: {}", e);
|
||||
}
|
||||
}
|
||||
|
||||
{
|
||||
let mut socket = sockets.get::<net::socket::TcpSocket>(handle);
|
||||
|
||||
info!("Socket state: {} at time {}", socket.state(), clock.elapsed());
|
||||
|
||||
if socket.may_recv() {
|
||||
yellow_led.set_high().unwrap();
|
||||
red_led.set_low().unwrap();
|
||||
let data = socket.recv(|data| {
|
||||
(data.len(), data)
|
||||
}).unwrap();
|
||||
if socket.can_send() {
|
||||
socket.send_slice("response".as_bytes()).unwrap();
|
||||
}
|
||||
}
|
||||
if socket.may_send() {
|
||||
yellow_led.set_high().unwrap();
|
||||
red_led.set_low().unwrap();
|
||||
debug!("close");
|
||||
socket.close();
|
||||
}
|
||||
}
|
||||
|
||||
match net_interface.poll_delay(&sockets, clock.elapsed()) {
|
||||
Some(net::time::Duration {millis :0}) => {
|
||||
clock.advance(net::time::Duration::from_millis(1));
|
||||
continue;
|
||||
}
|
||||
Some(time_delay) => {
|
||||
green_led.set_low().unwrap();
|
||||
delay.delay_ms(time_delay.total_millis() as u32);
|
||||
green_led.set_high().unwrap();
|
||||
clock.advance(time_delay)
|
||||
},
|
||||
None => {
|
||||
// delay.delay_ms(1_u32);
|
||||
clock.advance(net::time::Duration::from_millis(1))
|
||||
},
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,180 +0,0 @@
|
|||
use core::cell::RefCell;
|
||||
use nb;
|
||||
|
||||
use heapless::{consts, Vec};
|
||||
|
||||
use super::{net, NetworkInterface};
|
||||
use minimq::embedded_nal;
|
||||
|
||||
#[derive(Debug)]
|
||||
pub enum NetworkError {
|
||||
NoSocket,
|
||||
ConnectionFailure,
|
||||
ReadFailure,
|
||||
WriteFailure,
|
||||
}
|
||||
|
||||
// TODO: The network stack likely needs a time-tracking mechanic here to support
|
||||
// blocking/nonblocking/timeout based operations.
|
||||
pub struct NetworkStack<'a, 'b, 'c, 'n> {
|
||||
network_interface: &'n mut NetworkInterface,
|
||||
sockets: RefCell<net::socket::SocketSet<'a, 'b, 'c>>,
|
||||
next_port: RefCell<u16>,
|
||||
unused_handles: RefCell<Vec<net::socket::SocketHandle, consts::U16>>,
|
||||
}
|
||||
|
||||
impl<'a, 'b, 'c, 'n> NetworkStack<'a, 'b, 'c, 'n> {
|
||||
pub fn new(
|
||||
interface: &'n mut NetworkInterface,
|
||||
sockets: net::socket::SocketSet<'a, 'b, 'c>,
|
||||
) -> Self {
|
||||
let mut unused_handles: Vec<net::socket::SocketHandle, consts::U16> = Vec::new();
|
||||
for socket in sockets.iter() {
|
||||
unused_handles.push(socket.handle()).unwrap();
|
||||
}
|
||||
|
||||
NetworkStack {
|
||||
network_interface: interface,
|
||||
sockets: RefCell::new(sockets),
|
||||
next_port: RefCell::new(49152),
|
||||
unused_handles: RefCell::new(unused_handles),
|
||||
}
|
||||
}
|
||||
|
||||
pub fn update(&mut self, time: u32) -> bool {
|
||||
match self.network_interface.poll(
|
||||
&mut self.sockets.borrow_mut(),
|
||||
net::time::Instant::from_millis(time as i64),
|
||||
) {
|
||||
Ok(changed) => changed == false,
|
||||
Err(e) => {
|
||||
info!("{:?}", e);
|
||||
true
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
fn get_ephemeral_port(&self) -> u16 {
|
||||
// Get the next ephemeral port
|
||||
let current_port = self.next_port.borrow().clone();
|
||||
|
||||
let (next, wrap) = self.next_port.borrow().overflowing_add(1);
|
||||
*self.next_port.borrow_mut() = if wrap { 49152 } else { next };
|
||||
|
||||
return current_port;
|
||||
}
|
||||
}
|
||||
|
||||
impl<'a, 'b, 'c, 'n> embedded_nal::TcpStack for NetworkStack<'a, 'b, 'c, 'n> {
|
||||
type TcpSocket = net::socket::SocketHandle;
|
||||
type Error = NetworkError;
|
||||
|
||||
fn open(&self, _mode: embedded_nal::Mode) -> Result<Self::TcpSocket, Self::Error> {
|
||||
// TODO: Handle mode?
|
||||
match self.unused_handles.borrow_mut().pop() {
|
||||
Some(handle) => {
|
||||
// Abort any active connections on the handle.
|
||||
let mut sockets = self.sockets.borrow_mut();
|
||||
let internal_socket: &mut net::socket::TcpSocket = &mut *sockets.get(handle);
|
||||
internal_socket.abort();
|
||||
|
||||
Ok(handle)
|
||||
}
|
||||
None => Err(NetworkError::NoSocket),
|
||||
}
|
||||
}
|
||||
|
||||
fn connect(
|
||||
&self,
|
||||
socket: Self::TcpSocket,
|
||||
remote: embedded_nal::SocketAddr,
|
||||
) -> Result<Self::TcpSocket, Self::Error> {
|
||||
// TODO: Handle socket mode?
|
||||
|
||||
let mut sockets = self.sockets.borrow_mut();
|
||||
let internal_socket: &mut net::socket::TcpSocket = &mut *sockets.get(socket);
|
||||
|
||||
// If we're already in the process of connecting, ignore the request silently.
|
||||
if internal_socket.is_open() {
|
||||
return Ok(socket);
|
||||
}
|
||||
|
||||
match remote.ip() {
|
||||
embedded_nal::IpAddr::V4(addr) => {
|
||||
let address = {
|
||||
let octets = addr.octets();
|
||||
net::wire::Ipv4Address::new(octets[0], octets[1], octets[2], octets[3])
|
||||
};
|
||||
internal_socket
|
||||
.connect((address, remote.port()), self.get_ephemeral_port())
|
||||
.map_err(|_| NetworkError::ConnectionFailure)?;
|
||||
// internal_socket.set_timeout(Some(net::time::Duration::from_millis(2000)));
|
||||
}
|
||||
embedded_nal::IpAddr::V6(addr) => {
|
||||
let address = {
|
||||
let octets = addr.segments();
|
||||
net::wire::Ipv6Address::new(
|
||||
octets[0], octets[1], octets[2], octets[3], octets[4], octets[5],
|
||||
octets[6], octets[7],
|
||||
)
|
||||
};
|
||||
internal_socket
|
||||
.connect((address, remote.port()), self.get_ephemeral_port())
|
||||
.map_err(|_| NetworkError::ConnectionFailure)?;
|
||||
// internal_socket.set_timeout(Some(net::time::Duration::from_millis(2000)));
|
||||
}
|
||||
};
|
||||
|
||||
Ok(socket)
|
||||
}
|
||||
|
||||
fn is_connected(&self, socket: &Self::TcpSocket) -> Result<bool, Self::Error> {
|
||||
let mut sockets = self.sockets.borrow_mut();
|
||||
let socket: &mut net::socket::TcpSocket = &mut *sockets.get(*socket);
|
||||
|
||||
Ok(socket.may_send() && socket.may_recv())
|
||||
}
|
||||
|
||||
fn write(&self, socket: &mut Self::TcpSocket, buffer: &[u8]) -> nb::Result<usize, Self::Error> {
|
||||
// TODO: Handle the socket mode.
|
||||
|
||||
let mut sockets = self.sockets.borrow_mut();
|
||||
let socket: &mut net::socket::TcpSocket = &mut *sockets.get(*socket);
|
||||
|
||||
let result = socket.send_slice(buffer);
|
||||
|
||||
match result {
|
||||
Ok(num_bytes) => Ok(num_bytes),
|
||||
Err(_) => Err(nb::Error::Other(NetworkError::WriteFailure)),
|
||||
}
|
||||
}
|
||||
|
||||
fn read(
|
||||
&self,
|
||||
socket: &mut Self::TcpSocket,
|
||||
buffer: &mut [u8],
|
||||
) -> nb::Result<usize, Self::Error> {
|
||||
// TODO: Handle the socket mode.
|
||||
|
||||
let mut sockets = self.sockets.borrow_mut();
|
||||
let socket: &mut net::socket::TcpSocket = &mut *sockets.get(*socket);
|
||||
|
||||
let result = socket.recv_slice(buffer);
|
||||
|
||||
match result {
|
||||
Ok(num_bytes) => Ok(num_bytes),
|
||||
Err(_) => Err(nb::Error::Other(NetworkError::ReadFailure)),
|
||||
}
|
||||
}
|
||||
|
||||
fn close(&self, socket: Self::TcpSocket) -> Result<(), Self::Error> {
|
||||
// TODO: Free the ephemeral port in use by the socket.
|
||||
|
||||
let mut sockets = self.sockets.borrow_mut();
|
||||
let internal_socket: &mut net::socket::TcpSocket = &mut *sockets.get(socket);
|
||||
internal_socket.close();
|
||||
|
||||
self.unused_handles.borrow_mut().push(socket).unwrap();
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
use smoltcp::time::{Duration, Instant};
|
||||
use core::cell::Cell;
|
||||
|
||||
#[derive(Debug)]
|
||||
pub struct Clock(Cell<Instant>);
|
||||
|
||||
impl Clock {
|
||||
pub fn new() -> Clock {
|
||||
Clock(Cell::new(Instant::from_millis(0)))
|
||||
}
|
||||
|
||||
pub fn advance(&self, duration: Duration) {
|
||||
self.0.set(self.0.get() + duration)
|
||||
}
|
||||
|
||||
pub fn elapsed(&self) -> Instant {
|
||||
self.0.get()
|
||||
}
|
||||
}
|
||||
|
|
@ -1,78 +0,0 @@
|
|||
// Enables ITM
|
||||
pub unsafe fn enable_itm(
|
||||
dbgmcu: &stm32h7xx_hal::stm32::DBGMCU,
|
||||
dcb: &mut cortex_m::peripheral::DCB,
|
||||
itm: &mut cortex_m::peripheral::ITM
|
||||
) {
|
||||
// ARMv7-M DEMCR: Set TRCENA. Enables DWT and ITM units
|
||||
//unsafe { *(0xE000_EDFC as *mut u32) |= 1 << 24 };
|
||||
dcb.enable_trace();
|
||||
|
||||
// Ensure debug blocks are clocked before interacting with them
|
||||
dbgmcu.cr.modify(|_, w| {
|
||||
w.d1dbgcken()
|
||||
.set_bit()
|
||||
.d3dbgcken()
|
||||
.set_bit()
|
||||
.traceclken()
|
||||
.set_bit()
|
||||
.dbgsleep_d1()
|
||||
.set_bit()
|
||||
});
|
||||
|
||||
// SWO: Unlock
|
||||
*(0x5c00_3fb0 as *mut u32) = 0xC5ACCE55;
|
||||
// SWTF: Unlock
|
||||
*(0x5c00_4fb0 as *mut u32) = 0xC5ACCE55;
|
||||
|
||||
// SWO CODR Register: Set SWO speed
|
||||
*(0x5c00_3010 as *mut _) = 200;
|
||||
|
||||
// SWO SPPR Register:
|
||||
// 1 = Manchester
|
||||
// 2 = NRZ
|
||||
*(0x5c00_30f0 as *mut _) = 2;
|
||||
|
||||
// SWTF Trace Funnel: Enable for CM7
|
||||
*(0x5c00_4000 as *mut u32) |= 1;
|
||||
|
||||
// ITM: Unlock
|
||||
itm.lar.write(0xC5ACCE55);
|
||||
// ITM Trace Enable Register: Enable lower 8 stimulus ports
|
||||
itm.ter[0].write(1);
|
||||
// ITM Trace Control Register: Enable ITM
|
||||
itm.tcr.write(
|
||||
(0b000001 << 16) | // TraceBusID
|
||||
(1 << 3) | // enable SWO output
|
||||
(1 << 0), // enable the ITM
|
||||
);
|
||||
}
|
||||
|
||||
use panic_itm as _;
|
||||
|
||||
use lazy_static::lazy_static;
|
||||
use log::LevelFilter;
|
||||
|
||||
pub use cortex_m_log::log::Logger;
|
||||
|
||||
use cortex_m_log::{
|
||||
destination::Itm as ItmDest,
|
||||
printer::itm::InterruptSync,
|
||||
modes::InterruptFree,
|
||||
printer::itm::ItmSync
|
||||
};
|
||||
|
||||
lazy_static! {
|
||||
static ref LOGGER: Logger<ItmSync<InterruptFree>> = Logger {
|
||||
level: LevelFilter::Trace,
|
||||
inner: unsafe {
|
||||
InterruptSync::new(
|
||||
ItmDest::new(cortex_m::Peripherals::steal().ITM)
|
||||
)
|
||||
},
|
||||
};
|
||||
}
|
||||
|
||||
pub fn init() {
|
||||
cortex_m_log::log::init(&LOGGER).unwrap();
|
||||
}
|
||||
Loading…
Reference in New Issue