migen: debug spi connection

.cargo/config

@@ -1,5 +1,5 @@
 [target.thumbv7em-none-eabihf]
-runner = "gdb -q -x gdb_config/fpga_config.gdb"
+runner = "gdb -q -x gdb_config/debug.gdb"
 rustflags = [
   "-C", "link-arg=-Tlink.x",
 ]

migen/fpga_config.py

@@ -28,6 +28,9 @@ class UrukulConnector(Module):
 			eem.p[5].eq(spi.cs[2]),
 		]
 
+		# Debug purposes: Tie MISO to MOSI
+		self.comb += spi.miso.eq(spi.mosi)
+
 
 if __name__ == "__main__":
 	platform = HumpbackPlatform()

src/main.rs

@@ -49,36 +49,34 @@ fn main() -> ! {
 		Err(_)		=> hprintln!("Error: Cannot read C_DONE"),
 	}.unwrap();
 
-	hprintln!("Start reading pin output...").unwrap();
-	delay.delay_ms(200_u16);
+	/*
+	 *	Using SPI1, AF5
+	 *  SCLK -> PA5
+	 *	MOSI -> PB5
+	 *	MISO -> PA6
+	 *	CS -> 0: PB12, 1: PA15, 2: PC7
+	 */
 
+	let sclk = gpioa.pa5.into_alternate_af5();
+	let mosi = gpiob.pb5.into_alternate_af5();
+	let miso = gpioa.pa6.into_alternate_af5();
 
-	let pin = gpioa.pa0.into_pull_up_input();
-	let mut state = pin.is_high().unwrap();
+	let mut spi = dp.SPI1.spi(
+		(sclk, miso, mosi),
+		spi::MODE_0,
+		12.mhz(),
+		ccdr.peripheral.SPI1,
+		&ccdr.clocks,
+	);
 
-	hprintln!("Initial reading...");
-
-	match state {
-		true 	=> hprintln!("High."),
-		false 	=> hprintln!("Low."),
-	}.unwrap();
-
-	hprintln!("Polling...");
+	let mut data :u8 = 0xAD;
 
 	loop {
-		if pin.is_high().unwrap() != state {
-			match !state {
-				true 	=> hprintln!("High."),
-				false 	=> hprintln!("Low."),
-			}.unwrap();
-			state = !state;
-		}
-
-		if fpga_cdone.is_low().unwrap() {
-			hprintln!("FPGA is in reset state.");
-		}
+		hprintln!("Sent {}", data).unwrap();
+		block!(spi.send(data)).unwrap();
+		data = block!(spi.read()).unwrap();
+		hprintln!("Read {}", data).unwrap();
 	}
-
 }