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mirror of https://github.com/m-labs/artiq.git synced 2024-12-22 18:04:03 +08:00
artiq/artiq/compiler
2015-12-31 22:36:25 +08:00
..
algorithms compiler: do not associate SSA values with iodelay even when inlining. 2015-12-25 15:02:33 +08:00
analyses analyses.domination: consider unreachable blocks dominated by any other. 2015-12-18 16:39:52 +08:00
testbench compiler: embed host exception constructors as such (fixes #204). 2015-12-26 03:17:29 +08:00
transforms Commit missing parts of 8aa34ee9. 2015-12-31 22:36:25 +08:00
validators transforms.cfg_simplifier: remove. 2015-12-31 17:07:36 +08:00
__init__.py compiler: pull in dependencies in more finely grained way (fixes #181). 2015-11-24 17:32:04 +08:00
asttyped.py compiler: do not associate SSA values with iodelay even when inlining. 2015-12-25 15:02:33 +08:00
builtins.py compiler: don't require exceptions to inherit ARTIQException. 2015-12-31 21:54:54 +08:00
embedding.py compiler: don't require exceptions to inherit ARTIQException. 2015-12-31 21:54:54 +08:00
iodelay.py compiler.iodelay: correctly fold max(0, [0, ]...). 2015-11-24 00:46:55 +08:00
ir.py ir: fix incoming_{blocks,values,value_for_block}. 2015-12-30 16:06:18 +08:00
module.py transforms.cfg_simplifier: remove. 2015-12-31 17:07:36 +08:00
prelude.py compiler.prelude: add @portable as an alias for @kernel. 2015-12-18 23:00:29 +08:00
targets.py compiler: make IR dumps vastly more readable. 2015-11-17 00:23:34 +03:00
types.py validators.escape: infer correct region for arguments. 2015-12-30 16:19:35 +08:00