Yann Sionneau 250f9e0bc0 manual: update artiq_coreconfig parameter's syntax		2015-06-17 16:46:39 +02:00
..
Makefile	doc: add sphinx infrastructure	2014-09-18 17:45:54 +08:00
conf.py	fix doc build	2015-06-06 00:55:48 +08:00
core_device_flash_storage.rst	flash_storage: refactor + unit tests + artiq_coreconfig.py CLI + doc	2015-05-27 18:06:12 +08:00
core_drivers_reference.rst	coredevice: rename rtio to ttl, integrated in+out driver, loopback on the same pin in tests	2015-05-02 10:35:21 +08:00
core_language_reference.rst	doc: fixes and add sync_struct docstrings	2015-01-19 19:20:14 +08:00
default_network_ports.rst	doc/manual: list core device port	2015-04-28 00:00:00 +08:00
developing_a_ndsp.rst	controllers: consistent device/simulation specification	2015-03-22 00:48:15 +01:00
faq.rst	recover_underflow -> break_realtime	2015-05-03 20:45:28 +08:00
fpga_board_ports.rst	Remove UP support.	2015-04-27 20:43:45 +08:00
getting_started.rst	manual: explain how to compile and flash the idle kernel	2015-05-29 17:38:23 +02:00
index.rst	flash_storage: refactor + unit tests + artiq_coreconfig.py CLI + doc	2015-05-27 18:06:12 +08:00
installing.rst	manual: update artiq_coreconfig parameter's syntax	2015-06-17 16:46:39 +02:00
introduction.rst	README/manual: refactor intro	2015-03-23 18:49:07 -06:00
management_system.rst	doc/manual/management: add short descriptions of tools	2015-02-15 14:55:15 -07:00
ndsp_reference.rst	doc/manual: list core device port	2015-04-28 00:00:00 +08:00
protocols_reference.rst	doc: use sphinx-argparse	2015-01-23 00:52:13 +08:00
utilities.rst	manual: update artiq_coreconfig parameter's syntax	2015-06-17 16:46:39 +02:00