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mirror of https://github.com/m-labs/artiq.git synced 2024-12-28 04:38:27 +08:00
artiq/artiq/compiler
2015-12-26 17:24:05 +08:00
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algorithms compiler: do not associate SSA values with iodelay even when inlining. 2015-12-25 15:02:33 +08:00
analyses analyses.domination: consider unreachable blocks dominated by any other. 2015-12-18 16:39:52 +08:00
testbench compiler: embed host exception constructors as such (fixes #204). 2015-12-26 03:17:29 +08:00
transforms transforms.artiq_ir_generator: fix While codegen (closes #207). 2015-12-26 17:24:05 +08:00
validators validators.escape: don't fail on quoted values in lhs. 2015-12-16 13:57:02 +08:00
__init__.py compiler: pull in dependencies in more finely grained way (fixes #181). 2015-11-24 17:32:04 +08:00
asttyped.py compiler: do not associate SSA values with iodelay even when inlining. 2015-12-25 15:02:33 +08:00
builtins.py compiler: implement 'with watchdog' support. 2015-12-10 23:11:00 +08:00
embedding.py compiler: embed host exception constructors as such (fixes #204). 2015-12-26 03:17:29 +08:00
iodelay.py compiler.iodelay: correctly fold max(0, [0, ]...). 2015-11-24 00:46:55 +08:00
ir.py compiler: do not associate SSA values with iodelay even when inlining. 2015-12-25 15:02:33 +08:00
module.py analyses.domination: consider unreachable blocks dominated by any other. 2015-12-18 16:39:52 +08:00
prelude.py compiler.prelude: add @portable as an alias for @kernel. 2015-12-18 23:00:29 +08:00
targets.py compiler: make IR dumps vastly more readable. 2015-11-17 00:23:34 +03:00
types.py compiler.types: make TValue hashable. 2015-12-18 17:31:20 +08:00