artiq/artiq/test/coredevice
Robert Jördens 90c9fa446f test: add array transfer test
200 kB/s, more than a factor of 10 slower than the bare string transfer

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-28 14:30:44 +00:00
..
__init__.py test/*/: add missing __init__.py 2016-01-18 14:22:40 -07:00
test_ad9910.py test_ad9910: relax tests 2019-01-09 17:27:42 +00:00
test_analyzer.py ttl: Add target RTIO time argument to timestamp/count functions 2018-11-03 20:33:19 +08:00
test_cache.py test/coredevice/cache: fix exception import 2016-03-19 18:00:10 +08:00
test_compile.py add unittest for artiq_compile and ELF artiq_run (#455) 2017-08-15 08:13:11 -06:00
test_edge_counter.py Add gateware input event counter 2019-01-15 10:55:07 +00:00
test_embedding.py compiler: handle async RPC as last statement in try block. 2018-08-07 07:06:53 +00:00
test_i2c.py test: add test for exception on non-existent I2C bus 2017-06-19 15:32:09 +08:00
test_moninj.py test: fix handling of missing devices 2018-08-09 16:51:12 +08:00
test_performance.py test: add array transfer test 2019-01-28 14:30:44 +00:00
test_portability.py rpc_proto: serialize keywords correctly. 2018-08-07 06:47:09 +00:00
test_rtio.py test_loopback_gate_timing: fix lat_offset 2018-12-02 20:52:32 +08:00
test_spi.py test_spi: move to new spi2 core 2018-02-21 19:41:05 +01:00
test_stress.py firmware: don't truncate queued RPCs (fixes #985). 2018-04-21 19:39:46 +00:00
test_urukul.py urukul: expand attenuator HITL unittests 2018-12-07 21:06:12 +00:00