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Sebastien Bourdeauducq 99d530e498 targets/ARTIQMiniSoC: remove 2 TTL channels to make room in FPGA 2014-12-01 17:31:35 +08:00
..
logo README: use PNG logo 2014-10-29 10:22:11 +08:00
manual targets/ARTIQMiniSoC: remove 2 TTL channels to make room in FPGA 2014-12-01 17:31:35 +08:00
slides taaccs slides: fix spelling, get rid of lab_hardware.jpg 2014-10-31 10:02:57 +08:00