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mirror of https://github.com/m-labs/artiq.git synced 2025-02-02 13:50:20 +08:00
artiq/artiq/gateware/targets
2017-02-04 19:18:35 +08:00
..
__init__.py package everything to rebuild core device binaries 2015-11-09 10:47:14 +08:00
kc705_dds.py Use four ethmac buffers instead of two. 2017-01-30 07:42:27 +00:00
kc705_drtio_master.py drtio: forward clocks to SMA connectors for debugging 2017-02-03 12:00:36 +08:00
kc705_drtio_satellite.py drtio: fix satellite transceiver clocking 2017-02-04 19:18:35 +08:00
phaser.py targets: make number of ethmac slots consistent 2017-02-02 23:02:51 +08:00
pipistrello.py python3.5 -> python3 2017-01-30 09:24:43 +08:00