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mirror of https://github.com/m-labs/artiq.git synced 2024-12-12 21:26:37 +08:00
artiq/artiq/gateware
2016-11-04 15:17:19 +08:00
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amp Implement core device storage (fixes #219). 2016-01-10 13:04:55 +00:00
drtio drtio: differentiate local and remote unknown packet type errors 2016-11-04 15:17:19 +08:00
rtio unify rtio/drtio kernel interface 2016-11-01 00:30:16 +08:00
targets Si5324: actually write value of N32 into registers. 2016-11-02 07:09:04 +00:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9xxx.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
nist_clock.py gateware/nist_clock: increase DDS bus drive strength. Closes #468 2016-06-07 11:08:19 -04:00
nist_qc1.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
nist_qc2.py qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00
soc.py drtio: split kernel/system CSRs 2016-10-31 18:09:36 +08:00
spi.py gateware/spi: fix import 2016-10-17 14:47:19 +08:00