artiq/artiq/compiler/transforms
David Nadlinger 00a27b105a compiler: Extract maximum alignment from target data layout
In particular, i64/double are actually supposed to be aligned
to their size on RISC-V (at least according to the ELF psABI),
though it is unclear to me whether this actually caused any
issues.
2022-11-14 11:37:45 +08:00
..
__init__.py compiler: hoist loads of kernel invariants to function entry block. 2018-05-25 02:18:13 +00:00
artiq_ir_generator.py Remove `outer_final` 2022-02-24 19:58:33 +08:00
asttyped_rewriter.py compiler: add support for bytes type and b"x" literals (#714). 2017-06-09 07:10:48 +00:00
cast_monomorphizer.py compiler: monomorphize casts first, but more carefully. 2019-02-07 06:24:32 +00:00
constant_hoister.py compiler: remove debug print. 2018-05-25 09:37:18 +00:00
dead_code_eliminator.py compiler: fixed dead code eliminator 2022-01-26 07:16:54 +08:00
inferencer.py compiler: supports kernel decorators with path 2021-07-02 17:01:31 +08:00
int_monomorphizer.py compiler: monomorphize casts first, but more carefully. 2019-02-07 06:24:32 +00:00
interleaver.py Rename 'with parallel' to 'with interleave' (#265). 2016-02-22 13:24:43 +00:00
iodelay_estimator.py compiler: don't typecheck RPCs except for return type. 2016-04-26 01:12:36 +00:00
llvm_ir_generator.py compiler: Extract maximum alignment from target data layout 2022-11-14 11:37:45 +08:00
local_demoter.py compiler: implement local variable demotion. 2018-05-19 17:05:34 +00:00
typedtree_printer.py compiler.transforms: implement a typedtree printer. 2017-03-02 15:28:04 +00:00