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mirror of https://github.com/m-labs/artiq.git synced 2024-12-12 21:26:37 +08:00
artiq/artiq/gateware/targets
2018-01-22 18:25:10 +08:00
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__init__.py package everything to rebuild core device binaries 2015-11-09 10:47:14 +08:00
kasli.py refactor targets 2018-01-22 18:25:10 +08:00
kc705.py refactor targets 2018-01-22 18:25:10 +08:00
sayma_amc.py refactor targets 2018-01-22 18:25:10 +08:00
sayma_rtm.py sayma_rtm: add UART loopback to easily know if rtm fpga is alive 2018-01-20 06:04:34 +01:00