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artiq
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4438 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 87fdad97ca devices/lda: break off main function 2014-12-10 12:01:31 +08:00
Sebastien Bourdeauducq eb42cf2bb4 doc/manual/installing: LLVM_CONFIG_PATH does not work with the llvmlite ffi makefile. Use PATH instead. 2014-12-10 10:52:38 +08:00
Sebastien Bourdeauducq 46e78a4ff1 doc/manual/installing: fix paths (thanks Joe) 2014-12-10 10:46:03 +08:00
Sebastien Bourdeauducq 08f2aa8503 management/scheduler: replace queue with transparent list + semaphore 2014-12-09 16:26:50 +08:00
Sebastien Bourdeauducq 059608d1fd dds: fix phase modes 2014-12-09 13:50:33 +08:00
Sebastien Bourdeauducq 9628e1d013 manual/installing: remove useless cd 2014-12-09 11:28:38 +08:00
Sebastien Bourdeauducq cb48dba29c coredevice: fix external clock ref_period computation 2014-12-09 11:22:55 +08:00
Sebastien Bourdeauducq 597fe57fb3 pyon: unit support 2014-12-09 10:48:47 +08:00
Sebastien Bourdeauducq e814da1ba3 master/client: use dpdb and file import 2014-12-08 19:22:02 +08:00
Sebastien Bourdeauducq 123656e2cd fractions: fix comparison 2014-12-08 19:21:16 +08:00
Sebastien Bourdeauducq 72c24ba320 identify_controller -> artiq_ctlid 2014-12-08 16:12:39 +08:00
Sebastien Bourdeauducq fd28bfbb7c artiq_run: reference module by filename 2014-12-08 16:11:31 +08:00
Sebastien Bourdeauducq bfe980d458 py2llvm: distinguish between llvmlite Module and ModuleRef 2014-12-06 15:14:39 +08:00
Sebastien Bourdeauducq b830dd527c test/py2llvm: pep8 2014-12-06 14:54:41 +08:00
Sebastien Bourdeauducq 9165031fd5 test/py2llvm: support 32-bit machines 2014-12-06 14:52:33 +08:00
Sebastien Bourdeauducq 0e9c9b25b0 README: update 2014-12-05 17:14:52 +08:00
Sebastien Bourdeauducq 159f632a65 switch to llvmlite 2014-12-05 17:05:43 +08:00
Sebastien Bourdeauducq b93b969e2a doc/pc_rpc: add warning about mutable types 2014-12-04 18:04:54 +08:00
Sebastien Bourdeauducq 044756287f test: add serialization 2014-12-04 17:52:22 +08:00
Sebastien Bourdeauducq 4c7749bd01 pyon: partial JSON compatibility 2014-12-03 23:46:59 +08:00
Sebastien Bourdeauducq fd8f3be946 pyon: pretty printing 2014-12-03 23:25:51 +08:00
Sebastien Bourdeauducq 2a95d27770 device and parameter database 2014-12-03 18:20:30 +08:00
Sebastien Bourdeauducq a41009f92a coredevice/comm_dummy: support clock-switching functions 2014-12-03 18:16:18 +08:00
Sebastien Bourdeauducq 5b8f34bae2 language/core/kernel: support return values 2014-12-03 17:21:26 +08:00
Sebastien Bourdeauducq 85b4d70ced pyon: add file I/O functions 2014-12-03 17:18:43 +08:00
Sebastien Bourdeauducq 6de650a701 doc/manual: minor fixes 2014-12-02 19:23:15 +08:00
Sebastien Bourdeauducq 2a843ea436 language: replace AutoContext 'parameter' string with abstract attributes 
This allows specifying default values for parameters, and other data.
 2014-12-02 17:19:05 +08:00
Sebastien Bourdeauducq 83d3b97b23 coredevice/comm_serial: give up on garbage received after baudrate change 2014-12-02 16:04:41 +08:00
Sebastien Bourdeauducq cad5933709 transforms/inline: do not writeback bool 2014-12-02 15:53:41 +08:00
Sebastien Bourdeauducq 649fedd656 coredevice/core: fix recover_underflow 2014-12-02 15:31:09 +08:00
Sebastien Bourdeauducq fc690ead75 runtime: support clock switching 2014-12-02 14:06:32 +08:00
Sebastien Bourdeauducq 94218f785e comm_serial: cleanup 2014-12-02 11:09:02 +08:00
Yann Sionneau 20adb57140 comm_serial: allow to use dynamic baudrate 2014-12-02 10:42:14 +08:00
Yann Sionneau 3ff3afe696 manual: use theme options which looks like m-labs web site 2014-12-02 10:32:27 +08:00
Yann Sionneau 0c20445413 lda: allow to simulate without needing hidapi 
This also fixes some old style string formating
 2014-12-01 19:39:13 +08:00
Sebastien Bourdeauducq c591f1a74d targets/ARTIQMiniSoC: support dynamic switching of RTIO clock to XTRIG 2014-12-01 18:53:29 +08:00
Sebastien Bourdeauducq 57d633f48e rtio: remove unnecessary attributes 2014-12-01 17:47:24 +08:00
Sebastien Bourdeauducq cd587e4f12 rtio: do housekeeping in gateware 2014-12-01 17:32:36 +08:00
Sebastien Bourdeauducq 99d530e498 targets/ARTIQMiniSoC: remove 2 TTL channels to make room in FPGA 2014-12-01 17:31:35 +08:00
Sebastien Bourdeauducq 3a27f49bff frontend/runelf: use new Comm 2014-12-01 15:24:38 +08:00
Sebastien Bourdeauducq 2146e58d20 frontend: rename files to avoid conflicts 2014-12-01 15:20:35 +08:00
Sebastien Bourdeauducq 50e0bf3280 rtio: optimize flag handling 2014-12-01 14:29:50 +08:00
Sebastien Bourdeauducq 572eecc57b rtio: stricter upper bound on guard time to avoid race condition 2014-12-01 14:27:03 +08:00
Sebastien Bourdeauducq d50dbc0e73 coredevice/runtime_exceptions: update RTIO exception behaviour doc 2014-12-01 13:57:25 +08:00
Sebastien Bourdeauducq 7166ca82d1 targets/ARTIQMiniSoC: map RTIO CSRs directly on Wishbone (reduces programming time by 30%) 2014-11-30 22:31:55 +08:00
Sebastien Bourdeauducq 1f6441948d more TTL channels and larger input FIFOs on Papilio Pro 2014-11-30 15:50:57 +08:00
Sebastien Bourdeauducq e5286c57ab rtio: fix input FIFO depth config 2014-11-30 12:12:35 +08:00
Sebastien Bourdeauducq bf745e53c9 rtio: register FIFO output to improve timing 2014-11-30 10:51:12 +08:00
Sebastien Bourdeauducq dda4002ae1 rtio/phy: fix input synchronization 2014-11-30 10:50:48 +08:00
Sebastien Bourdeauducq c78c5a2b4f rtio: fix guard cycle computation 2014-11-30 01:00:52 +08:00