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Commit Graph

17 Commits

Author SHA1 Message Date
Yann Sionneau
4bf7875b87 flash_storage: refactor + unit tests + artiq_coreconfig.py CLI + doc 2015-05-27 18:06:12 +08:00
e61368e897 doc/manual: list core device port 2015-04-28 00:00:00 +08:00
bba434e951 README/manual: refactor intro 2015-03-23 18:49:07 -06:00
8340516801 doc/manual: add faq (edited from artiq-log) 2015-03-23 18:49:07 -06:00
4558fb3e33 clarify controller terminology 2015-02-16 08:57:15 -07:00
9fb42e4952 doc: use sphinx-argparse 2015-01-23 00:52:13 +08:00
3e22fe86b5 reorganize files as per discussion with Robert 2015-01-17 19:38:20 +08:00
d59d110f78 doc/manual: add ports to index 2014-11-21 18:08:40 -08:00
d5a3f3ef51 doc/manual: driver writing tutorial 2014-10-27 20:38:02 +08:00
4d0e5db955 doc/manual: split core/controller drivers 2014-10-27 16:41:48 +08:00
4eda58fbc9 doc/manual: tutorial -> getting started 2014-10-27 16:08:49 +08:00
27fc19e415 pyon: add doc 2014-10-27 12:54:59 +08:00
73d0a84b44 doc: various cleanups 2014-09-30 18:10:40 +08:00
5099643f84 devices/rtio_core: rename RTIOCounter to RTIOIn and document 2014-09-30 16:42:07 +08:00
9f82ff81f2 doc: add some tutorial steps 2014-09-29 14:50:29 +08:00
626fa782c3 doc: add installation instructions 2014-09-28 23:25:32 +08:00
00bd6edc45 doc: add sphinx infrastructure 2014-09-18 17:45:54 +08:00