Spaqin
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69cddc6b86
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rtio_clocking: add warnings for unsupported rtio_clock settings (#1773)
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2021-10-28 16:34:22 +08:00 |
Spaqin
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9b1d7e297d
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runtime: clock input specification improvements
closes #1735
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2021-10-28 16:21:51 +08:00 |
Harry Ho
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f6d39fd6ba
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kc705: revive DRTIO master with updated syntax
* KC705 master variant now uses Si5324 as synthesiser.
* Multi-channel has not been implemented yet.
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2021-01-20 15:05:31 +08:00 |
Sebastien Bourdeauducq
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57ee57e7ea
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runtime: fix metlino si5324 init (2)
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2020-10-14 18:41:56 +08:00 |
Sebastien Bourdeauducq
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ac35548d0f
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runtime: fix metlino si5324 init
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2020-10-14 12:57:25 +08:00 |
Sebastien Bourdeauducq
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35c61ce24d
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si5324: unify N31 settings when used as synthesizer
Closes #1528
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2020-10-12 14:45:52 +08:00 |
Sebastien Bourdeauducq
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9214e0f3e2
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firmware: fix Si5324 CKIN selection on Kasli 2.0
https://github.com/sinara-hw/Kasli/issues/82#issuecomment-702129805
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2020-10-02 20:35:32 +08:00 |
Sebastien Bourdeauducq
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fb0ade77a9
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firmware: fix non-DRTIO build
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2020-04-10 17:23:17 +08:00 |
Sebastien Bourdeauducq
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61d4614b61
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sayma: fix/cleanup DRTIO-DAC sync interaction
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2020-04-06 22:34:05 +08:00 |
Robert Jördens
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e0687b77f5
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si5324: 10 MHz ext_ref_frequency
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT
Signed-off-by: Robert Jördens <rj@quartiq.de>
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2019-11-22 18:29:12 +01:00 |
Sebastien Bourdeauducq
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5a9bb0ecba
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runtime: fix incorrect 'RTIO clock failed' report
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2019-06-24 23:33:13 +08:00 |
Sebastien Bourdeauducq
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53c778ae2d
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runtime: fix previous commit
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2019-06-14 15:53:01 +08:00 |
Sebastien Bourdeauducq
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a947867887
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runtime: support Kasli Si5324 bypass via rtio_clock=e
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2019-06-14 15:48:05 +08:00 |
Sebastien Bourdeauducq
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66a66b03b4
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style
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2019-06-14 15:29:16 +08:00 |
Sebastien Bourdeauducq
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87ce24e867
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runtime: refactor startup and RTIO clocking initialization
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2019-06-14 15:26:30 +08:00 |