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spi2: use new rtio_output() API

This commit is contained in:
Sebastien Bourdeauducq 2018-11-08 20:09:37 +08:00
parent d18546550e
commit e8d58b35b4
1 changed files with 3 additions and 3 deletions
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6
artiq/coredevice/spi2.py
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@ -7,7 +7,7 @@ Output event replacement is not supported and issuing commands at the same
time is an error.
"""
from artiq.language.core import syscall, kernel, portable, now_mu, delay_mu
from artiq.language.core import syscall, kernel, portable, delay_mu
from artiq.language.types import TInt32, TNone
from artiq.coredevice.rtio import rtio_output, rtio_input_data
@ -166,7 +166,7 @@ class SPIMaster:
raise ValueError("Invalid SPI transfer length")
if div > 257 or div < 2:
raise ValueError("Invalid SPI clock divider")
rtio_output(now_mu(), self.channel, SPI_CONFIG_ADDR, flags |
rtio_output((self.channel << 8) | SPI_CONFIG_ADDR, flags |
((length - 1) << 8) | ((div - 2) << 16) | (cs << 24))
self.update_xfer_duration_mu(div, length)
delay_mu(self.ref_period_mu)
@ -216,7 +216,7 @@ class SPIMaster:
:param data: SPI output data to be written.
"""
rtio_output(now_mu(), self.channel, SPI_DATA_ADDR, data)
rtio_output((self.channel << 8) | SPI_DATA_ADDR, data)
delay_mu(self.xfer_duration_mu)
@kernel