mirror of https://github.com/m-labs/artiq.git
mailbox: parametrize address width
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@ -3,9 +3,9 @@ from misoc.interconnect import wishbone
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class Mailbox(Module):
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def __init__(self, size=1):
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self.i1 = wishbone.Interface()
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self.i2 = wishbone.Interface()
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def __init__(self, size=1, adr_width=30):
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self.i1 = wishbone.Interface(data_width=32, adr_width=adr_width)
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self.i2 = wishbone.Interface(data_width=32, adr_width=adr_width)
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# # #
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