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kasli: add HUST variants
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parent
81f2b2c864
commit
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323
artiq/examples/kasli_basic/device_db_hust.py
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323
artiq/examples/kasli_basic/device_db_hust.py
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@ -0,0 +1,323 @@
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core_addr = "kasli-1.lab.m-labs.hk"
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device_db = {
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"core": {
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"type": "local",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"arguments": {"host": core_addr, "ref_period": 1e-9}
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},
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"core_log": {
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"type": "controller",
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"host": "::1",
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"port": 1068,
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"command": "aqctl_corelog -p {port} --bind {bind} " + core_addr
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},
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"core_cache": {
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"type": "local",
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"module": "artiq.coredevice.cache",
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"class": "CoreCache"
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},
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"core_dma": {
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"type": "local",
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"module": "artiq.coredevice.dma",
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"class": "CoreDMA"
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},
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"i2c_switch0": {
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"type": "local",
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"module": "artiq.coredevice.i2c",
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"class": "PCA9548",
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"arguments": {"address": 0xe0}
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},
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"i2c_switch1": {
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"type": "local",
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"module": "artiq.coredevice.i2c",
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"class": "PCA9548",
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"arguments": {"address": 0xe2}
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},
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}
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kasli2 = 0x010000
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for i in range(16):
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device_db["ttl" + str(i)] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut" if i < 4 else "TTLOut",
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"arguments": {"channel": i},
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}
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for i in range(8):
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device_db["ttl" + str(16+i)] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": kasli2 | i},
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}
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device_db.update(
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spi_urukul0={
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 16}
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},
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ttl_urukul0_io_update={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 17}
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},
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ttl_urukul0_sw0={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 18}
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},
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ttl_urukul0_sw1={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 19}
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},
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ttl_urukul0_sw2={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 20}
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},
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ttl_urukul0_sw3={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 21}
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},
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urukul0_cpld={
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"type": "local",
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"module": "artiq.coredevice.urukul",
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"class": "CPLD",
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"arguments": {
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"spi_device": "spi_urukul0",
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"io_update_device": "ttl_urukul0_io_update",
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"refclk": 125e6,
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"clk_sel": 2
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}
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}
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)
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for i in range(4):
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device_db["urukul0_ch" + str(i)] = {
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {
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"pll_n": 32,
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"chip_select": 4 + i,
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"cpld_device": "urukul0_cpld",
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"sw_device": "ttl_urukul0_sw" + str(i)
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}
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}
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device_db.update(
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spi_urukul1={
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 22}
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},
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ttl_urukul1_io_update={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 23}
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},
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ttl_urukul1_sw0={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 24}
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},
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ttl_urukul1_sw1={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 25}
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},
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ttl_urukul1_sw2={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 26}
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},
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ttl_urukul1_sw3={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 27}
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},
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urukul1_cpld={
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"type": "local",
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"module": "artiq.coredevice.urukul",
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"class": "CPLD",
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"arguments": {
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"spi_device": "spi_urukul1",
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"io_update_device": "ttl_urukul1_io_update",
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"refclk": 125e6,
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"clk_sel": 2
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}
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}
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)
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for i in range(4):
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device_db["urukul1_ch" + str(i)] = {
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {
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"pll_n": 32,
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"chip_select": 4 + i,
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"cpld_device": "urukul1_cpld",
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"sw_device": "ttl_urukul1_sw" + str(i)
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}
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}
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device_db.update(
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spi_urukul2={
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": kasli2 | 12}
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},
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ttl_urukul2_io_update={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": kasli2 | 13}
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},
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ttl_urukul2_sw0={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": kasli2 | 14}
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},
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ttl_urukul2_sw1={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": kasli2 | 15}
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},
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ttl_urukul2_sw2={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": kasli2 | 16}
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},
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ttl_urukul2_sw3={
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": kasli2 | 17}
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},
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urukul2_cpld={
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"type": "local",
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"module": "artiq.coredevice.urukul",
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"class": "CPLD",
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"arguments": {
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"spi_device": "spi_urukul2",
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"io_update_device": "ttl_urukul2_io_update",
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"refclk": 125e6,
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"clk_sel": 0
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}
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}
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)
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for i in range(4):
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device_db["urukul2_ch" + str(i)] = {
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"type": "local",
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"module": "artiq.coredevice.ad9912",
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"class": "AD9912",
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"arguments": {
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"pll_n": 8,
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"chip_select": 4 + i,
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"cpld_device": "urukul2_cpld",
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"sw_device": "ttl_urukul2_sw" + str(i)
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}
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}
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device_db["spi_sampler0_adc"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 28}
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}
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device_db["spi_sampler0_pgia"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 29}
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}
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device_db["spi_sampler0_cnv"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 30},
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}
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device_db["sampler0"] = {
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"type": "local",
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"module": "artiq.coredevice.sampler",
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"class": "Sampler",
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"arguments": {
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"spi_adc_device": "spi_sampler0_adc",
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"spi_pgia_device": "spi_sampler0_pgia",
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"cnv_device": "spi_sampler0_cnv"
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}
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}
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device_db["grabber0"] = {
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"type": "local",
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"module": "artiq.coredevice.grabber",
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"class": "Grabber",
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"arguments": {"channel_base": kasli2 | 8}
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}
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device_db["grabber1"] = {
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"type": "local",
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"module": "artiq.coredevice.grabber",
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"class": "Grabber",
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"arguments": {"channel_base": kasli2 | 10}
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}
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device_db["spi_zotino0"] = {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": kasli2 | 18}
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}
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device_db["ttl_zotino0_ldac"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": kasli2 | 19}
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}
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device_db["ttl_zotino0_clr"] = {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": kasli2 | 20}
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}
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device_db["zotino0"] = {
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"type": "local",
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"module": "artiq.coredevice.zotino",
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"class": "Zotino",
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"arguments": {
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"spi_device": "spi_zotino0",
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"ldac_device": "ttl_zotino0_ldac",
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"clr_device": "ttl_zotino0_clr"
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}
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}
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@ -1236,10 +1236,59 @@ class VLBAISatellite(_SatelliteBase):
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self.add_rtio(self.rtio_channels)
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class HUSTMaster(_MasterBase):
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def __init__(self, hw_rev=None, *args, **kwargs):
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if hw_rev is None:
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hw_rev = "v1.1"
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_MasterBase.__init__(self, rtio_clk_freq=125e6, hw_rev=hw_rev,
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enable_sata=True, *args, **kwargs)
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self.rtio_channels = []
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eem.DIO.add_std(self, 0,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 1,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 2, 3, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 4, 5, ttl_serdes_7series.Output_8X)
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eem.Sampler.add_std(self, 6, 7, ttl_serdes_7series.Output_8X)
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self.config["HAS_RTIO_LOG"] = None
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self.config["RTIO_LOG_CHANNEL"] = len(self.rtio_channels)
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self.rtio_channels.append(rtio.LogChannel())
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self.add_rtio(self.rtio_channels)
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class HUSTSatellite(_SatelliteBase):
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def __init__(self, hw_rev=None, *args, **kwargs):
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if hw_rev is None:
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hw_rev = "v1.1"
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_SatelliteBase.__init__(self, rtio_clk_freq=125e6, hw_rev=hw_rev,
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enable_sata=True, *args, **kwargs)
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self.rtio_channels = []
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self.grabber_csr_group = []
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eem.DIO.add_std(self, 0,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.Grabber.add_std(self, 1, 2)
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eem.Grabber.add_std(self, 3, 4)
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eem.Urukul.add_std(self, 5, 6, ttl_serdes_7series.Output_8X)
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eem.Zotino.add_std(self, 7, ttl_serdes_7series.Output_8X)
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self.add_rtio(self.rtio_channels)
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self.config["HAS_GRABBER"] = None
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self.add_csr_group("grabber", self.grabber_csr_group)
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self.platform.add_false_path_constraints(
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self.drtio_transceiver.gtps[0].txoutclk, self.grabber0.deserializer.cd_cl.clk)
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self.platform.add_false_path_constraints(
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self.drtio_transceiver.gtps[0].txoutclk, self.grabber1.deserializer.cd_cl.clk)
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VARIANTS = {cls.__name__.lower(): cls for cls in [
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Opticlock, SUServo, PTB, PTB2, HUB, LUH,
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SYSU, MITLL, MITLL2, USTC, Tsinghua, Tsinghua2, WIPM, NUDT, Berkeley,
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VLBAIMaster, VLBAISatellite, Tester, Master, Satellite]}
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VLBAIMaster, VLBAISatellite, HUSTMaster, HUSTSatellite,
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Tester, Master, Satellite]}
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def main():
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