mirror of https://github.com/m-labs/artiq.git
metlino: drive clock muxes
This commit is contained in:
parent
bf9f4e380a
commit
c7de1f2e6b
|
@ -53,6 +53,8 @@ class Master(MiniSoC, AMPSoC):
|
|||
platform = self.platform
|
||||
rtio_clk_freq = 150e6
|
||||
|
||||
self.comb += platform.request("input_clk_sel").eq(1)
|
||||
self.comb += platform.request("filtered_clk_sel").eq(1)
|
||||
self.submodules.si5324_rst_n = gpio.GPIOOut(platform.request("si5324").rst_n)
|
||||
self.csr_devices.append("si5324_rst_n")
|
||||
i2c = self.platform.request("i2c")
|
||||
|
|
Loading…
Reference in New Issue