diff --git a/artiq/gateware/eem.py b/artiq/gateware/eem.py
index 13ddde9f2..5615ff928 100644
--- a/artiq/gateware/eem.py
+++ b/artiq/gateware/eem.py
@@ -19,6 +19,10 @@ def _eem_pin(eem, i, pol):
     return "eem{}:{}_{}".format(eem, _eem_signal(i), pol)
 
 
+def default_iostandard(eem):
+    return IOStandard("LVDS_25")
+
+
 class _EEM:
     @classmethod
     def add_extension(cls, target, eem, *args, **kwargs):
@@ -30,15 +34,15 @@ class _EEM:
 
 class DIO(_EEM):
     @staticmethod
-    def io(eem, iostandard="LVDS_25"):
+    def io(eem, iostandard):
         return [("dio{}".format(eem), i,
             Subsignal("p", Pins(_eem_pin(eem, i, "p"))),
             Subsignal("n", Pins(_eem_pin(eem, i, "n"))),
-            IOStandard(iostandard))
+            iostandard(eem))
             for i in range(8)]
 
     @classmethod
-    def add_std(cls, target, eem, ttl03_cls, ttl47_cls, iostandard="LVDS_25",
+    def add_std(cls, target, eem, ttl03_cls, ttl47_cls, iostandard=default_iostandard,
             edge_counter_cls=None):
         cls.add_extension(target, eem, iostandard=iostandard)
 
@@ -67,7 +71,7 @@ class DIO(_EEM):
 
 class Urukul(_EEM):
     @staticmethod
-    def io(eem, eem_aux, iostandard="LVDS_25"):
+    def io(eem, eem_aux, iostandard):
         ios = [
             ("urukul{}_spi_p".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
@@ -75,7 +79,7 @@ class Urukul(_EEM):
                 Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
                 Subsignal("cs_n", Pins(
                     *(_eem_pin(eem, i + 3, "p") for i in range(3)))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
             ("urukul{}_spi_n".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
@@ -83,7 +87,7 @@ class Urukul(_EEM):
                 Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
                 Subsignal("cs_n", Pins(
                     *(_eem_pin(eem, i + 3, "n") for i in range(3)))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
         ]
         ttls = [(6, eem, "io_update"),
@@ -102,26 +106,26 @@ class Urukul(_EEM):
                 ("urukul{}_{}".format(eem, sig), 0,
                     Subsignal("p", Pins(_eem_pin(j, i, "p"))),
                     Subsignal("n", Pins(_eem_pin(j, i, "n"))),
-                    IOStandard(iostandard), *extra_args
+                    iostandard(j), *extra_args
                 ))
         return ios
 
     @staticmethod
-    def io_qspi(eem0, eem1, iostandard="LVDS_25"):
+    def io_qspi(eem0, eem1, iostandard):
         ios = [
             ("urukul{}_spi_p".format(eem0), 0,
                 Subsignal("clk", Pins(_eem_pin(eem0, 0, "p"))),
                 Subsignal("mosi", Pins(_eem_pin(eem0, 1, "p"))),
                 Subsignal("cs_n", Pins(
                     _eem_pin(eem0, 3, "p"), _eem_pin(eem0, 4, "p"))),
-                IOStandard(iostandard),
+                iostandard(eem0),
             ),
             ("urukul{}_spi_n".format(eem0), 0,
                 Subsignal("clk", Pins(_eem_pin(eem0, 0, "n"))),
                 Subsignal("mosi", Pins(_eem_pin(eem0, 1, "n"))),
                 Subsignal("cs_n", Pins(
                     _eem_pin(eem0, 3, "n"), _eem_pin(eem0, 4, "n"))),
-                IOStandard(iostandard),
+                iostandard(eem0),
             ),
         ]
         ttls = [(6, eem0, "io_update"),
@@ -130,38 +134,35 @@ class Urukul(_EEM):
                 (5, eem1, "sw1"),
                 (6, eem1, "sw2"),
                 (7, eem1, "sw3")]
-        for i, j, sig in ttls:
+        for i, j, iostandard, sig in ttls:
             ios.append(
                 ("urukul{}_{}".format(eem0, sig), 0,
                     Subsignal("p", Pins(_eem_pin(j, i, "p"))),
                     Subsignal("n", Pins(_eem_pin(j, i, "n"))),
-                    IOStandard(iostandard)
+                    iostandard(j)
                 ))
         ios += [
             ("urukul{}_qspi_p".format(eem0), 0,
-                Subsignal("cs", Pins(_eem_pin(eem0, 5, "p"))),
-                Subsignal("clk", Pins(_eem_pin(eem0, 2, "p"))),
-                Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "p"))),
-                Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p"))),
-                Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p"))),
-                Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p"))),
-                IOStandard(iostandard),
+                Subsignal("cs", Pins(_eem_pin(eem0, 5, "p"), iostandard(eem0))),
+                Subsignal("clk", Pins(_eem_pin(eem0, 2, "p"), iostandard(eem0))),
+                Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "p"), iostandard(eem1))),
+                Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p"), iostandard(eem1))),
+                Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p"), iostandard(eem1))),
+                Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p"), iostandard(eem1))),
             ),
             ("urukul{}_qspi_n".format(eem0), 0,
-                Subsignal("cs", Pins(_eem_pin(eem0, 5, "n"))),
-                Subsignal("clk", Pins(_eem_pin(eem0, 2, "n"))),
-                Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "n"))),
-                Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n"))),
-                Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n"))),
-                Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n"))),
-                IOStandard(iostandard),
+                Subsignal("cs", Pins(_eem_pin(eem0, 5, "n"), iostandard(eem0))),
+                Subsignal("clk", Pins(_eem_pin(eem0, 2, "n"), iostandard(eem0))),
+                Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "n"), iostandard(eem1))),
+                Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n"), iostandard(eem1))),
+                Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n"), iostandard(eem1))),
+                Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n"), iostandard(eem1))),
             ),
         ]
         return ios
 
     @classmethod
-    def add_std(cls, target, eem, eem_aux, ttl_out_cls, sync_gen_cls=None,
-                iostandard="LVDS_25"):
+    def add_std(cls, target, eem, eem_aux, ttl_out_cls, sync_gen_cls=None, iostandard=default_iostandard):
         cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
 
         phy = spi2.SPIMaster(target.platform.request("urukul{}_spi_p".format(eem)),
@@ -190,37 +191,37 @@ class Urukul(_EEM):
 
 class Sampler(_EEM):
     @staticmethod
-    def io(eem, eem_aux, iostandard="LVDS_25"):
+    def io(eem, eem_aux, iostandard):
         ios = [
             ("sampler{}_adc_spi_p".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
                 Subsignal("miso", Pins(_eem_pin(eem, 1, "p"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
             ("sampler{}_adc_spi_n".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
                 Subsignal("miso", Pins(_eem_pin(eem, 1, "n"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
             ("sampler{}_pgia_spi_p".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 4, "p"))),
                 Subsignal("mosi", Pins(_eem_pin(eem, 5, "p"))),
                 Subsignal("miso", Pins(_eem_pin(eem, 6, "p"))),
                 Subsignal("cs_n", Pins(_eem_pin(eem, 7, "p"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
             ("sampler{}_pgia_spi_n".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 4, "n"))),
                 Subsignal("mosi", Pins(_eem_pin(eem, 5, "n"))),
                 Subsignal("miso", Pins(_eem_pin(eem, 6, "n"))),
                 Subsignal("cs_n", Pins(_eem_pin(eem, 7, "n"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
         ] + [
             ("sampler{}_{}".format(eem, sig), 0,
                 Subsignal("p", Pins(_eem_pin(j, i, "p"))),
                 Subsignal("n", Pins(_eem_pin(j, i, "n"))),
-                IOStandard(iostandard)
+                iostandard(j)
             ) for i, j, sig in [
                 (2, eem, "sdr"),
                 (3, eem, "cnv")
@@ -235,7 +236,7 @@ class Sampler(_EEM):
                     Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "p"))),
                     Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "p"))),
                     Misc("DIFF_TERM=TRUE"),
-                    IOStandard(iostandard),
+                    iostandard(eem_aux),
                 ),
                 ("sampler{}_adc_data_n".format(eem), 0,
                     Subsignal("clkout", Pins(_eem_pin(eem_aux, 0, "n"))),
@@ -244,13 +245,13 @@ class Sampler(_EEM):
                     Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "n"))),
                     Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "n"))),
                     Misc("DIFF_TERM=TRUE"),
-                    IOStandard(iostandard),
+                    iostandard(eem_aux),
                 ),
             ]
         return ios
 
     @classmethod
-    def add_std(cls, target, eem, eem_aux, ttl_out_cls, iostandard="LVDS_25"):
+    def add_std(cls, target, eem, eem_aux, ttl_out_cls, iostandard=default_iostandard):
         cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
 
         phy = spi2.SPIMaster(
@@ -275,7 +276,7 @@ class Sampler(_EEM):
 
 class Novogorny(_EEM):
     @staticmethod
-    def io(eem, iostandard="LVDS_25"):
+    def io(eem, iostandard):
         return [
             ("novogorny{}_spi_p".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
@@ -283,7 +284,7 @@ class Novogorny(_EEM):
                 Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
                 Subsignal("cs_n", Pins(
                     _eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
             ("novogorny{}_spi_n".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
@@ -291,13 +292,13 @@ class Novogorny(_EEM):
                 Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
                 Subsignal("cs_n", Pins(
                     _eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
         ] + [
             ("novogorny{}_{}".format(eem, sig), 0,
                 Subsignal("p", Pins(_eem_pin(j, i, "p"))),
                 Subsignal("n", Pins(_eem_pin(j, i, "n"))),
-                IOStandard(iostandard)
+                iostandard(j)
             ) for i, j, sig in [
                 (5, eem, "cnv"),
                 (6, eem, "busy"),
@@ -306,7 +307,7 @@ class Novogorny(_EEM):
         ]
 
     @classmethod
-    def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"):
+    def add_std(cls, target, eem, ttl_out_cls, iostandard=default_iostandard):
         cls.add_extension(target, eem, iostandard=iostandard)
 
         phy = spi2.SPIMaster(target.platform.request("novogorny{}_spi_p".format(eem)),
@@ -322,7 +323,7 @@ class Novogorny(_EEM):
 
 class Zotino(_EEM):
     @staticmethod
-    def io(eem, iostandard="LVDS_25"):
+    def io(eem, iostandard):
         return [
             ("zotino{}_spi_p".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
@@ -330,7 +331,7 @@ class Zotino(_EEM):
                 Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
                 Subsignal("cs_n", Pins(
                     _eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
             ("zotino{}_spi_n".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
@@ -338,13 +339,13 @@ class Zotino(_EEM):
                 Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
                 Subsignal("cs_n", Pins(
                     _eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
         ] + [
             ("zotino{}_{}".format(eem, sig), 0,
                     Subsignal("p", Pins(_eem_pin(j, i, "p"))),
                     Subsignal("n", Pins(_eem_pin(j, i, "n"))),
-                    IOStandard(iostandard)
+                    iostandard(j)
             ) for i, j, sig in [
                 (5, eem, "ldac_n"),
                 (6, eem, "busy"),
@@ -353,7 +354,7 @@ class Zotino(_EEM):
         ]
 
     @classmethod
-    def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"):
+    def add_std(cls, target, eem, ttl_out_cls, iostandard=default_iostandard):
         cls.add_extension(target, eem, iostandard=iostandard)
 
         spi_phy = spi2.SPIMaster(target.platform.request("zotino{}_spi_p".format(eem)),
@@ -378,29 +379,29 @@ class Zotino(_EEM):
 
 class Grabber(_EEM):
     @staticmethod
-    def io(eem, eem_aux, iostandard="LVDS_25"):
+    def io(eem, eem_aux, iostandard):
         ios = [
             ("grabber{}_video".format(eem), 0,
                 Subsignal("clk_p", Pins(_eem_pin(eem, 0, "p"))),
                 Subsignal("clk_n", Pins(_eem_pin(eem, 0, "n"))),
                 Subsignal("sdi_p", Pins(*[_eem_pin(eem, i, "p") for i in range(1, 5)])),
                 Subsignal("sdi_n", Pins(*[_eem_pin(eem, i, "n") for i in range(1, 5)])),
-                IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
+                iostandard(eem), Misc("DIFF_TERM=TRUE")
             ),
             ("grabber{}_cc0".format(eem), 0,
                 Subsignal("p", Pins(_eem_pin(eem, 5, "p"))),
                 Subsignal("n", Pins(_eem_pin(eem, 5, "n"))),
-                IOStandard(iostandard)
+                iostandard(eem)
             ),
             ("grabber{}_cc1".format(eem), 0,
                 Subsignal("p", Pins(_eem_pin(eem, 6, "p"))),
                 Subsignal("n", Pins(_eem_pin(eem, 6, "n"))),
-                IOStandard(iostandard)
+                iostandard(eem)
             ),
             ("grabber{}_cc2".format(eem), 0,
                 Subsignal("p", Pins(_eem_pin(eem, 7, "p"))),
                 Subsignal("n", Pins(_eem_pin(eem, 7, "n"))),
-                IOStandard(iostandard)
+                iostandard(eem)
             ),
         ]
         if eem_aux is not None:
@@ -410,28 +411,29 @@ class Grabber(_EEM):
                     Subsignal("clk_n", Pins(_eem_pin(eem_aux, 0, "n"))),
                     Subsignal("sdi_p", Pins(*[_eem_pin(eem_aux, i, "p") for i in range(1, 5)])),
                     Subsignal("sdi_n", Pins(*[_eem_pin(eem_aux, i, "n") for i in range(1, 5)])),
-                    IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
+                    iostandard(eem_aux), Misc("DIFF_TERM=TRUE")
                 ),
                 ("grabber{}_serrx".format(eem), 0,
                     Subsignal("p", Pins(_eem_pin(eem_aux, 5, "p"))),
                     Subsignal("n", Pins(_eem_pin(eem_aux, 5, "n"))),
-                    IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
+                    iostandard(eem_aux), Misc("DIFF_TERM=TRUE")
                 ),
                 ("grabber{}_sertx".format(eem), 0,
                     Subsignal("p", Pins(_eem_pin(eem_aux, 6, "p"))),
                     Subsignal("n", Pins(_eem_pin(eem_aux, 6, "n"))),
-                    IOStandard(iostandard)
+                    iostandard(eem_aux)
                 ),
                 ("grabber{}_cc3".format(eem), 0,
                     Subsignal("p", Pins(_eem_pin(eem_aux, 7, "p"))),
                     Subsignal("n", Pins(_eem_pin(eem_aux, 7, "n"))),
-                    IOStandard(iostandard)
+                    iostandard(eem_aux)
                 ),
             ]
         return ios
 
     @classmethod
-    def add_std(cls, target, eem, eem_aux=None, eem_aux2=None, ttl_out_cls=None, iostandard="LVDS_25"):
+    def add_std(cls, target, eem, eem_aux=None, eem_aux2=None, ttl_out_cls=None,
+            iostandard=default_iostandard):
         cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
 
         pads = target.platform.request("grabber{}_video".format(eem))
@@ -469,7 +471,7 @@ class Grabber(_EEM):
 
 class SUServo(_EEM):
     @staticmethod
-    def io(*eems, iostandard="LVDS_25"):
+    def io(*eems, iostandard):
         assert len(eems) in (4, 6)
         io = (Sampler.io(*eems[0:2], iostandard=iostandard)
                 + Urukul.io_qspi(*eems[2:4], iostandard=iostandard))
@@ -480,7 +482,7 @@ class SUServo(_EEM):
     @classmethod
     def add_std(cls, target, eems_sampler, eems_urukul,
                 t_rtt=4, clk=1, shift=11, profile=5,
-                iostandard="LVDS_25"):
+                iostandard=default_iostandard):
         """Add a 8-channel Sampler-Urukul Servo
 
         :param t_rtt: upper estimate for clock round-trip propagation time from
@@ -562,21 +564,21 @@ class SUServo(_EEM):
 
 class Mirny(_EEM):
     @staticmethod
-    def io(eem, iostandard="LVDS_25"):
+    def io(eem, iostandard):
         ios = [
             ("mirny{}_spi_p".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
                 Subsignal("mosi", Pins(_eem_pin(eem, 1, "p"))),
                 Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
                 Subsignal("cs_n", Pins(_eem_pin(eem, 3, "p"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
             ("mirny{}_spi_n".format(eem), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
                 Subsignal("mosi", Pins(_eem_pin(eem, 1, "n"))),
                 Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
                 Subsignal("cs_n", Pins(_eem_pin(eem, 3, "n"))),
-                IOStandard(iostandard),
+                iostandard(eem),
             ),
         ]
         for i in range(4):
@@ -584,12 +586,12 @@ class Mirny(_EEM):
                 ("mirny{}_io{}".format(eem, i), 0,
                     Subsignal("p", Pins(_eem_pin(eem, 4 + i, "p"))),
                     Subsignal("n", Pins(_eem_pin(eem, 4 + i, "n"))),
-                    IOStandard(iostandard)
+                    iostandard(eem)
                 ))
         return ios
 
     @classmethod
-    def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"):
+    def add_std(cls, target, eem, ttl_out_cls, iostandard=default_iostandard):
         cls.add_extension(target, eem, iostandard=iostandard)
 
         phy = spi2.SPIMaster(
@@ -607,7 +609,7 @@ class Mirny(_EEM):
 
 class Fastino(_EEM):
     @staticmethod
-    def io(eem, iostandard="LVDS_25"):
+    def io(eem, iostandard):
         return [
             ("fastino{}_ser_{}".format(eem, pol), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, pol))),
@@ -615,11 +617,11 @@ class Fastino(_EEM):
                     for i in range(1, 7)))),
                 Subsignal("miso", Pins(_eem_pin(eem, 7, pol)),
                           Misc("DIFF_TERM=TRUE")),
-                IOStandard(iostandard),
+                iostandard(eem),
             ) for pol in "pn"]
 
     @classmethod
-    def add_std(cls, target, eem, log2_width, iostandard="LVDS_25"):
+    def add_std(cls, target, eem, log2_width, iostandard=default_iostandard):
         cls.add_extension(target, eem, iostandard=iostandard)
 
         phy = fastino.Fastino(target.platform.request("fastino{}_ser_p".format(eem)),
@@ -631,7 +633,7 @@ class Fastino(_EEM):
 
 class Phaser(_EEM):
     @staticmethod
-    def io(eem, iostandard="LVDS_25"):
+    def io(eem, iostandard):
         return [
             ("phaser{}_ser_{}".format(eem, pol), 0,
                 Subsignal("clk", Pins(_eem_pin(eem, 0, pol))),
@@ -639,11 +641,11 @@ class Phaser(_EEM):
                     for i in range(1, 7)))),
                 Subsignal("miso", Pins(_eem_pin(eem, 7, pol)),
                           Misc("DIFF_TERM=TRUE")),
-                IOStandard(iostandard),
+                iostandard(eem),
             ) for pol in "pn"]
 
     @classmethod
-    def add_std(cls, target, eem, iostandard="LVDS_25"):
+    def add_std(cls, target, eem, iostandard=default_iostandard):
         cls.add_extension(target, eem, iostandard=iostandard)
 
         phy = phaser.Phaser(